Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsDev KitsPCB design board

User's Guide

SLUU522–August 2011

Using the TPS53355EVM-743, High-Efficiency, 30-A,

Synchronous Buck Converter With Eco-mode™

Control Scheme

The TPS53355EVM-743 evaluation module (EVM) allows users to evaluate the TPS53355. The

TPS53355 is a D-CAP™ mode, 30-A synchronous buck converter with integrated MOSFETs. It provides a

fixed 1.5-V output at up to 30 A from a 12-V input bus.

Contents

1 Description ................................................................................................................... 3

1.1 Typical Applications ................................................................................................ 3

1.2 Features ............................................................................................................. 3

2 Electrical Performance Specifications .................................................................................... 4

3 Schematic .................................................................................................................... 5

4 Test Setup ................................................................................................................... 6

4.1 Test Equipment ..................................................................................................... 6

4.2 Recommended Test Setup ....................................................................................... 7

5 Configurations ............................................................................................................... 8

5.1 Switching Frequency Selection .................................................................................. 8

5.2 Soft-Start Selection ................................................................................................ 8

5.3 Mode Selection ..................................................................................................... 8

5.4 Enable Selection ................................................................................................... 9

6 Test Procedure .............................................................................................................. 9

6.1 Line/Load Regulation and Efficiency Measurement Procedure .............................................. 9

6.2 Control Loop Gain and Phase Measurement Procedure ..................................................... 9

6.3 Test Point List ..................................................................................................... 10

6.4 Equipment Shutdown ............................................................................................ 10

7 Performance Data and Typical Characteristic Curves ................................................................ 11

7.1 Efficiency .......................................................................................................... 11

7.2 Load Regulation .................................................................................................. 11

7.3 Line Regulation ................................................................................................... 12

7.4 Enable Turnon/Turnoff ........................................................................................... 12

7.5 Output Ripple ..................................................................................................... 13

7.6 Switching Node ................................................................................................... 13

7.7 Output Transient With Auto-Skip Mode ........................................................................ 14

7.8 Output Transient With FCCM Mode ........................................................................... 14

7.9 Output 0.75-V Prebias Turnon .................................................................................. 15

7.10 Output Overcurrent and Short-Circuit Protection ............................................................. 15

7.11 Bode Plot .......................................................................................................... 16

7.12 Thermal Image .................................................................................................... 17

8 EVM Assembly Drawing and PCB Layout ............................................................................. 18

9 Bill of Materials ............................................................................................................. 22

List of Figures

1 TPS53355EVM-743 Schematic ........................................................................................... 5

2 Tip and Barrel Measurement for VOUT Ripple ......................................................................... 6

Eco-mode, D-CAP are trademarks of Texas Instruments.

SLUU522–August 2011 Using the TPS53355EVM-743, High-Efficiency, 30-A, Synchronous Buck

Converter With Eco-mode™— Control Scheme

Submit Documentation Feedback

Summary of content (28 pages)

PAGE 1
User's Guide SLUU522 – August 2011 Using the TPS53355EVM-743, High-Efficiency, 30-A, Synchronous Buck Converter With Eco-mode™ Control Scheme The TPS53355EVM-743 evaluation module (EVM) allows users to evaluate the TPS53355. The TPS53355 is a D-CAP™ mode, 30-A synchronous buck converter with integrated MOSFETs. It provides a fixed 1.5-V output at up to 30 A from a 12-V input bus. 1 2 3 4 5 6 7 8 9 Contents Description .................................................................................
PAGE 2
www.ti.com 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 ....................................................................... Efficiency ................................................................................................................... Load Regulation ........................................................................................................... Line Regulation ...............................................................................................
PAGE 3
Description www.ti.com 1 Description The TPS53355EVM-743 is designed to use a regulated 12-V bus to produce a regulated 1.5-V output at up to 30 A of load current. The TPS53355EVM-743 is designed to demonstrate the TPS53355 in a typical, low-voltage application while providing a number of test points to evaluate the performance of the TPS53355. 1.1 Typical Applications • • • 1.
PAGE 4
Electrical Performance Specifications 2 www.ti.com Electrical Performance Specifications Table 1. TPS53355EVM-743 Electrical Performance Specifications Parameters Test Conditions Min Typ Max 12 14 Units Input Characteristics Voltage range VIN Maximum input current VIN = 8 V, IO = 30 A 8 No load input current VIN = 14 V, IO = 0 A with auto-skip mode 6.
PAGE 5
Schematic www.ti.com Schematic FCCM AUTOSKIP 970 kHz 750 kHz 850 kHz 2.8ms SS 5.6ms SS 400 kHz 500 kHz 650 kHz 0.7ms SS 1.4ms SS 250 kHz 300 kHz + + + 3 Figure 1.
PAGE 6
Test Setup www.ti.com 4 Test Setup 4.1 Test Equipment Voltage Source: The input voltage source VIN must be a 0-V to 14-V variable dc source capable of supplying 10 Adc. Connect VIN to J1 as shown in Figure 3. Multimeters: • V1: VIN at TP1 (VIN) and TP2 (GND). • V2: VOUT at TP5 (VOUT) and TP7 (GND). • A1: VIN input current Output Load: The output load must be an electronic constant resistance mode load capable of 0 Adc to 30 Adc at 1.5 V.
PAGE 7
Test Setup www.ti.com 4.2 Recommended Test Setup FAN TEXAS INSTRUMENTS DC + Source Vin + V1 - V2 A1 Load - Figure 3. TPS53355EVM-743 Recommended Test Setup Figure 3 is the recommended test setup to evaluate the TPS53355EVM-743. Working at an ESD workstation, ensure that any wrist straps, bootstraps, or mats are connected referencing the user to earth ground before power is applied to the EVM. Input Connections: 1.
PAGE 8
Configurations 5 www.ti.com Configurations All jumper selections must be made prior to applying power to the EVM. Users can configure this EVM per the following configurations. 5.1 Switching Frequency Selection The switching frequency can be set by J5. Default setting: 500 kHz Table 2. Switching Frequency Selection Resistor (RF) Connections (kΩ) Switching Frequency (kHz) Top (1–2 pin shorted) 0 250 Second (3–4 pin shorted) 187 300 Jumper Set to 5.
PAGE 9
Test Procedure www.ti.com 5.4 Enable Selection The controller can be enabled and disabled by J2. Default setting: Jumper shorts on J2 to disable the controller Table 5. Enable Selection Jumper Set to Enable Selection Jumper shorts on J2 Disable the controller No jumper shorts on J2 Enable the controller 6 Test Procedure 6.1 Line/Load Regulation and Efficiency Measurement Procedure 1. Set up EVM as described in Section 4 and Figure 3. 2.
PAGE 10
Test Procedure 6.3 www.ti.com Test Point List Table 6. Test Point Functions 6.4 Test Points Name Description TP1 VIN Controller input TP2 GND Ground TP3 GND Ground TP4 EN Enable TP5 VOUT Output voltage TP6 LL Switching node TP7 GND Ground TP8 PGOOD Power Good TP9 VREG 5-V LDO output TP10 CHA Input A for loop injection TP11 CHB Input B for loop injection TP12 GND GND Equipment Shutdown 1. Shut down Load. 2. Shut down Load. 3. Shut down fan.
PAGE 11
Performance Data and Typical Characteristic Curves www.ti.com 7 Performance Data and Typical Characteristic Curves Figure 4 through Figure 18 present typical performance curves for TPS53355EVM-743. 7.1 Efficiency 100 12 Vin auto skip 90 8 Vin auto skip 80 70 Efficiency - % 14 Vin auto skip 60 8 Vin FCCM 50 12 Vin FCCM 40 30 14 Vin FCCM 20 10 0 0.001 0.01 0.1 1 10 100 IO - Output Current - A Figure 4. Efficiency 7.2 Load Regulation 1.53 1.
PAGE 12
Performance Data and Typical Characteristic Curves 7.3 www.ti.com Line Regulation 1.53 1.52 VO - Output Voltage - V IO = 0 A auto-skip IO = 0 A FCCM 1.51 1.5 IO = 30 A 1.49 1.48 1.47 8 9 10 11 12 VI - Input Voltage - V 13 14 Figure 6. Line Regulation 7.4 Enable Turnon/Turnoff TPS5335EVM Enable Start Up Test condition: 12 Vin, 1.5 V/30 A Auto Skip Mode TPS5335EVM Enable Shut Down CH1: EN CH1: EN CH2: 1.5 Vout CH2: 1.5 Vout CH3: PGOOD CH3: PGOOD Figure 7.
PAGE 13
Performance Data and Typical Characteristic Curves www.ti.com 7.5 Output Ripple TPS5335EVM Output Ripple Test condition: 12 Vin, 1.5 V/30 A Auto Skip Mode V1: V2: DV: CH1: 1.5 Vout 2.4 mV -9.6 mV -12.0 mV Figure 9. Output Ripple 7.6 Switching Node TPS5335EVM Switching Node Test condition: 12 Vin, 1.5 V/30 A Auto Skip Mode CH1: LL Figure 10.
PAGE 14
Performance Data and Typical Characteristic Curves 7.7 www.ti.com Output Transient With Auto-Skip Mode TPS5335EVM Output Transient from DCM to CCM Test condition: 12 Vin, 0 A -15 A Auto Skip Mode TPS5335EVM Output Transient from CCM to DCM Test condition: 12 Vin, 1.5 V/15 A-0 A Auto Skip Mode CH1: 1.5 Vout CH1: 1.5 Vout CH4: Output Current CH4: Output Current Figure 11. Output Transient From DCM to CCM 7.8 Figure 12.
PAGE 15
Performance Data and Typical Characteristic Curves www.ti.com 7.9 Output 0.75-V Prebias Turnon TPS5335EVM 0.75 V Pre-bias Enable Start up Test condition: 12 Vin, 1.5 V/0 A FCCM Mode CH1: EN CH2: 1.5 Vout CH3: PGOOD Figure 14. Output 0.75-V Prebias Turnon 7.10 Output Overcurrent and Short-Circuit Protection TPS53355EVM Over Current Protection Test Condition: 12 Vin OCP Ch1: 1.5 Vout Ch2: LL Ch3: PGOOD Figure 15.
PAGE 16
Performance Data and Typical Characteristic Curves TPS53355EVM Short Circuit Protection www.ti.com Test Condition: 12 Vin, 1.5 V Short Circuit Ch1: 1.5 Vout Ch2: LL Ch3: PGOOD Figure 16. Output Short Circuit 7.11 Bode Plot Figure 17. Bode Plot at 12 VIN, 1.
PAGE 17
Performance Data and Typical Characteristic Curves www.ti.com 7.12 Thermal Image Figure 18. Top Board at 12 VIN, 1.
PAGE 18
EVM Assembly Drawing and PCB Layout 8 www.ti.com EVM Assembly Drawing and PCB Layout The following illustrations (Figure 19 through Figure 26) show the design of the TPS53355EVM-743 printed-circuit board. The EVM was designed using a 6-layer, 2-oz copper circuit board. TEXAS INSTRUMENTS Figure 19. TPS53355EVM-743 Top Layer Assembly Drawing Figure 20.
PAGE 19
EVM Assembly Drawing and PCB Layout www.ti.com Figure 21. TPS53355EVM-743 Top Copper Figure 22.
PAGE 20
EVM Assembly Drawing and PCB Layout www.ti.com Figure 23. TPS53355EVM-743 Layer-3 Copper Figure 24.
PAGE 21
EVM Assembly Drawing and PCB Layout www.ti.com Figure 25. TPS53355EVM-743 Layer-5 Copper Figure 26.
PAGE 22
Bill of Materials 9 www.ti.com Bill of Materials Table 7. The EVM Components List According to the Schematic Shown in Figure 1 QTY DESCRIPTION MFR PART NUMBER 4 C1, C2, C3, C4 Capacitor, Ceramic, 22uF, 16V, X5R, 20%, 1210 MURATA GRM32ER61C226KE20L 5 C12, C13, C14, C15, C16 Capacitor, Ceramic, 100uF, 6.3V, X5R, 20%, 1210 MURATA GRM32ER60J107ME20L 1 C10 Capacitor, Ceramic, 2.2nF, 50V, X7R, 20%, 0603 STD STD 1 C11 Capacitor, Ceramic, 0.
PAGE 23
Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
PAGE 24
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods.
PAGE 25
FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
PAGE 26
【Important Notice for Users of this Product in Japan】】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.
PAGE 27
EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use.
PAGE 28
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.