Using the TPS53316EVM-075 User's Guide Literature Number: SLUU671 December 2011
User's Guide SLUU671 – December 2011 5-A Step-Down Regulator with Integrated Switcher 1 Introduction The TPS53316EVM-075 evaluation module (EVM) is a step-down regulator featuring TPS53316. The TPS53316 is a fully integrated step-down regulator employing voltage mode control. 2 Description The TPS53316EVM-075 is designed to use a 3.3-V or 5-V voltage rail to produce a regulated 1.5-V output at up to 5-A load current.
Electrical Performance Specifications www.ti.com 3 Electrical Performance Specifications Table 1. TPS53316EVM-075 Electrical Performance Specifications PARAMETER TEST CONDITIONS MIN TYP MAX 2.9 3.3/5.0 6.0 UNITS Input Characteristics Voltage range VIN Maximum input current VIN = 5 V, IOUT = 5 A No load input current VIN = 5 V, IOUT = 0 A under DE/HEF mode 1.76 V A 3 mA Output Characteristics Output voltage Output voltage regulation Output voltage ripple 1.
PWRGND VIN 2.9V - 6V GND VIN J2 2 1 TP9 GND VIN TP6 1 C5 1 C6 0 R8 J4 2 1 EN TP11 22uF C8 Open to Enable EN 22uF C7 TP4 GND C9 0.1uF 1.0uF R14 10.0k PGND PGND PGND VIN VIN 10 11 TP12 PGD C3 9 100pF PGD TPS53316RGT U1 FB C4 13 14 15 16 17 COMP VBST 12 VREG3 EN 1 AGND RF/OC 2 PGD 3 4 4 SW SW SW PS 6 7 8 0 Notes: R13 2.0k R7 3.3nF C1 0.1uF C18 1 R5 49.9 3.3nF C2 R3 GND TP5 10.0 TP2 CHB 1.0nF C19 2.0 R12 1.
Test Setup www.ti.com 5 Test Setup 5.1 Test Equipment Voltage Source, VIN: The input voltage source VIN should be a 0-V to 6-V variable DC source capable of supplying 5 ADC. Connect VIN to J2 as shown in Figure 3. Multimeters: • V1: VIN at TP6 (VIN) and TP9 (GND), 0-V to 6-V voltmeter • V2: VOUT at TP7 (VOUT) and TP10 (GND) • A1: VIN input current, 0-ADC to 5-ADC Ammeter Output Load: The output load should be an electronic constant resistance mode load capable of 0 ADC to 5 ADC at 1.5 V.
Test Setup 5.2 www.ti.com Recommended Test Setup Figure 3 is the recommended test set up to evaluate the TPS53316EVM-075. Working at an ESD workstation, make sure that any wrist straps, bootstraps or mats are connected referencing the user to earth ground before power is applied to the EVM. Input Connections: 1. Prior to connecting the DC input source VIN, it is advisable to limit the source current from VIN to 5 A maximum. Make sure VIN is initially set to 0 V and connected to J2 as shown in Figure 3.
Configurations www.ti.com 6 Configurations The user can configure this EVM per following configurations. Jumper J1 and J5 configurations should be made prior to applying power to the EVM. 6.1 Mode Selection The MODE can be set by J1. 6.1.1 Default Setting: HEF Mode, 4X S.S. Time Table 2. MODE Selection 6.2 MODE RESISTANCES (kΩ) MODE GND FCCM, 4X S.S. Time 24.3 HEF Mode, 4X S.S. Time 57.6 HEF Mode 105 DE Mode 174 DE Mode, 4X S.S.
Test Procedure www.ti.com 7 Test Procedure 7.1 Line/Load Regulation and Efficiency Measurement Procedure 1. Set up EVM as described in Section 5 and Figure 3. 2. Ensure load is set to constant resistance mode and to sink 0 ADC. 3. Ensure all jumpers set per Section 6. 4. Increase VIN from 0 V to 5 V. Using V1 to measure VIN voltage. 5. Open jumper J4 to enable the controller. 6. Use V2 to measure VOUT voltage, A1 to measure VIN current. 7.
Test Procedure www.ti.com 7.3 List of Test Points Table 4. The Functions of Each Test Points 7.4 TEST POINTS NAME DESCRIPTION TP1 CHA Input A for Loop Injection TP2 CHB Input B for Loop Injection TP3 VREG3 3.3-V Internal LDO Output TP4 GND GND TP5 GND GND TP6 VIN Input Voltage TP7 VOUT Output Voltage TP8 SW Switching Node GND TP9 GND TP10 GND GND TP11 EN Enable Pin TP12 PGD Power Good Output Equipment Shutdown 1. Shut down VIN. 2. Shut down Load. 3. Shut down FAN.
Performance Data and Typical Characteristic Curves 8 www.ti.com Performance Data and Typical Characteristic Curves Figure 4 through Figure 19 present typical performance curves for TPS53316EVM-075. 8.1 Efficiency 100 - Efficiency - % 95 90 85 VIN = 3.3 V, FCCM, fsw = 750 kHz 80 VIN = 3.3 V, DE Mode, fsw = 750 kHz 75 VIN = 3.3 V, HEF Mode, fsw = 750 kHz 70 0 1 2 3 4 5 ILOAD - Load Current - A Figure 4. 3.
Performance Data and Typical Characteristic Curves www.ti.com 8.2 Load Regulation VOUT - Output Voltage - V 1.51 1.505 1.5 FCCM, fsw = 750 kHz, VIN = 5 V DE Mode, fsw = 750 kHz, VIN = 5 V 1.495 HEF Mode, fsw = 750 kHz, VIN = 5 V 1.49 0 1 2 3 4 5 ILOAD - Load Current - A Figure 6. Load Regulation 8.3 Line Regulation VOUT - Output Voltage - V 1.51 1.505 FCCM, fsw = 750 kHz, Iout = 0 A 1.5 FCCM, fsw =750 kHz, Iout = 5 A DE Mode, fsw = 1.1 MHz, Iout = 0 A DE Mode, fsw = 1.
Performance Data and Typical Characteristic Curves 8.4 www.ti.com Output Transient Figure 8. Load 0-3A Transient under FCCM (5-V VIN, 1.5-V VOUT, FCCM, fsw = 750 kHz ) Figure 9. Load 0-3A Transient under HEF Mode (5-V VIN, 1.
www.ti.com 8.5 Performance Data and Typical Characteristic Curves Output Ripple Figure 10. Output Ripple (5-V VIN, 1.5-V VOUT, 5-A, FCCM, fsw = 750 kHz) Figure 11. Output Ripple (5-V VIN, 1.
Performance Data and Typical Characteristic Curves 8.6 www.ti.com Switching Node Figure 12. Switching Node (5-V VIN, 1.5-V VOUT, 5-A, FCCM, fsw = 750 kHz ) Figure 13. Switching Node (5-V VIN, 1.
Performance Data and Typical Characteristic Curves www.ti.com 8.7 Enable Turn On / Turn Off Figure 14. Turn-On Waveform ( 5-V VIN, 1.5-V VOUT, 5-A IOUT, 4XS.S.) Figure 15. Turn-Off Waveform ( 5-V VIN, 1.
Performance Data and Typical Characteristic Curves 8.8 www.ti.com Pre-bias Turn-On Figure 16. Pre-bias Turn-On Waveform ( 5-V VIN, 1.5-V VOUT, 0-A IOUT, 4XS.S., 0.5-V pre-bias) 8.9 Overcurrent Protection Figure 17. Overcurrent Protection Waveform ( 3.3-V VIN, 1.5-V VOUT, 6.5-A IOUT, 4XS.S., 750 kHz, 6.
Performance Data and Typical Characteristic Curves www.ti.com 8.10 Bode Plot Figure 18. Loop Gain (5-V VIN, 1.5-V VOUT, 5-A IOUT, HEF Mode, fSW = 750 kHz) 8.11 Thermal Image Figure 19. Thermal Image (6-V VIN, 1.5-V VOUT, 5-A IOUT, FCCM Mode, fSW = 2.
EVM Assembly Drawing and PCB Layout 9 www.ti.com EVM Assembly Drawing and PCB Layout The following figures (Figure 20 through Figure 25) show the design of the TPS53316EVM-075 printed circuit board. The EVM has been designed using a 4-layer, 2-oz copper circuit board. Figure 20.
EVM Assembly Drawing and PCB Layout www.ti.com Figure 21. TPS53316EVM-075 Bottom Assembly Drawing (bottom view) Figure 22.
EVM Assembly Drawing and PCB Layout www.ti.com Figure 23. TPS53316EVM-075 Layer 2 (top view) Figure 24.
EVM Assembly Drawing and PCB Layout www.ti.com Figure 25.
List of Materials 10 www.ti.com List of Materials The EVM components list according to the schematic shown in Figure 1. Table 5. TPS53316EVM-075 List of Materials QTY 22 REF DES DESCRIPTION PART NUMBER MFR 2 C1, C2 Capacitor, ceramic, 50 V, X7R, 10%, 3.3 nF, 603 Std Std 1 C3 Capacitor, ceramic, 50 V, X7R, 10%, 100 pF, 603 Std Std 1 C4 Capacitor, ceramic, 16 V, X7R, 15%, 1.
Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods.
FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
【Important Notice for Users of this Product in Japan】 】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.
EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
