Using the TPS53015EVM-126 User's Guide Literature Number: SLUU944 June 2012
User's Guide SLUU944 – June 2012 Single Synchronous Step-Down Controller for Low-Voltage Power Rails 1 Introduction The TPS53015EVM-126 evaluation module (EVM) presents an easy to use reference design for a typical point-of-load application in a stand-alone module using the TPS53015 controller in cost sensitive applications. 2 Description The TPS53015EVM-126 provides the user with a convenient way to evaluate the TPS53015 D-CAP2™ mode control in a cost sensitive application. Providing a 1.
Electrical Performance Specifications www.ti.com 3 Electrical Performance Specifications Table 1. TPS53015EVM-126 Electrical Performance Specifications PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Input Characteristics Voltage range VIN Maximum input current VIN = 12 V, IOUT = 8 A 8.0 0.9 12 22 V A No load input current VIN = 12 V, IOUT = 0 A 0.6 mA Output Characteristics Output voltage Output voltage regulation 1.
Disable (Default) Enable VIN 1.00k R8 1.00k R6 6 4 5 1 2 140 R11 4.7uF C11 VREG5 TP3 AGND EN TP5 S1 SW_G12AP Enable Circuitry PG TP4 VOUT PWRGND J1 VIN 1 C10 R4 R3 SH1 Single Synchronous Step-Down Controller for Low-Voltage Power Rails Copyright © 2012, Texas Instruments Incorporated C13 TP9 GND 0.1uF 5 4 3 2 1 Notes: 23.7k 8.
Test Setup www.ti.com 5 Test Setup 5.1 Test Equipment Voltage Source: • VIN: The input voltage source VIN should be a 0-V to 30-V variable DC source capable of supplying 2 ADC. Connect VIN to J1 as shown in Figure 3. Multimeters: • V1: VIN at TP1 (VIN) and TP2 (GND), 0-V to 30-V voltmeter. • V2: VOUT at TP7 (VOUT) and TP8 (GND). • A1: VIN input current, 0 ADC to 2 ADC Ammeter. Output Load: The output load should be an electronic constant resistance mode load capable of 0 ADC to 8 ADC at 1.05 V.
Test Setup 5.2 www.ti.com Recommended Test Setup Figure 3 is the recommended test set up to evaluate the TPS53015EVM-126. Working at an ESD workstation, make sure that any wrist straps, bootstraps or mats are connected referencing the user to earth ground before power is applied to the EVM. Figure 3. TPS53015EVM-126 Recommended Test Set Up Input Connections: • Prior to connecting the DC input source VIN, it is advisable to limit the source current from VIN to 2 A maximum.
Configurations www.ti.com 6 Configurations 6.1 Enable/Disable Switch S1 The TPS53015EVM-126 is equipped with a switch (S1) to drive the EN pin of the TPS53015. When S1 is in the Enable position, EN is connected to VIN, and the TPS53015 is enabled and generates a regulated 1.05-V output. When S1 is in the Disable position, EN is connected to GND, and the TPS53015 enters a high impedance output state. Default setting: set S1 to the Disabled position to disable the controller 7 Test Procedure 7.
Performance Data and Typical Characteristic Curves 8 www.ti.com Performance Data and Typical Characteristic Curves Figure 4 through Figure 14 present typical performance curves for TPS53015EVM-126. 8.1 Efficiency 100 90 Efficiency - % 80 70 60 50 40 VIN = 8 V 30 20 VIN = 12 V 10 VIN = 22 V 0 0.001 0.010 0.100 1.000 10.000 ILOAD - Load Current - A Figure 4. Efficiency 8.2 Load Regulation VOUT - Output Voltage - V 1.1 1.08 1.06 VIN = 8 V 1.04 VIN = 12 V 1.02 VIN = 22 V 1 0.001 0.
Performance Data and Typical Characteristic Curves www.ti.com 8.3 Line Regulation VOUT - Output Voltage - V 1.1 1.08 1.06 1.04 1.02 IOUT = 8 A 1 8 10 12 14 16 18 20 22 VIN - Input Voltage - V Figure 6. Line Regulation 8.4 Load Transient Figure 7. Output Load 0-8A Transient (12-V VIN, 1.
Performance Data and Typical Characteristic Curves 8.5 www.ti.com Output Ripple Figure 8. Output Ripple at No Load (12-V VIN, 1.05-V VOUT, 0-A) Figure 9. Output Ripple at Full Load (12-V VIN, 1.
www.ti.com 8.6 Performance Data and Typical Characteristic Curves Switching Node Figure 10. Switching Node at No Load (12-V VIN, 1.05-V VOUT, 0-A) Figure 11. Switching Node at Full Load (12-V VIN, 1.
Performance Data and Typical Characteristic Curves 8.7 www.ti.com Enable Start-up Figure 12. Start-up Waveform (12-V VIN, 1.05-V VOUT, 8-A IOUT) 8.8 Disable Figure 13. Shut-down Waveform (12-V VIN, 1.
www.ti.com 8.9 Performance Data and Typical Characteristic Curves Thermal Image Figure 14. Thermal Image (22-V VIN, 1.05-V VOUT, 8-A IOUT, no air flow) NOTE: The hottest spot is the surface of snubber resistor and power MOSFET, not the surface of TPS53015 controller device.
EVM Assembly Drawing and PCB Layout 9 www.ti.com EVM Assembly Drawing and PCB Layout The following figures (Figure 15 through Figure 19) show the design of the TPS53015EVM-126 printed circuit board. The EVM has been designed using a 4-layer, 2-ounce copper circuit board. Figure 15. TPS53015EVM-126 Top Layer Assembly Drawing (top view) Figure 16.
EVM Assembly Drawing and PCB Layout www.ti.com Figure 17. TPS53015EVM-126 Layer 2 (top view) Figure 18.
EVM Assembly Drawing and PCB Layout www.ti.com Figure 19.
List of Materials www.ti.com 10 List of Materials The EVM components list according to the schematic shown in Figure 1. Table 3. TPS53015EVM-126 List of Materials QTY DESCRIPTION PART NUMBER MFR C1, C2, C3 Capacitor, ceramic, 35 V, X5R, 20%, 10 µF, 1210 Std Std 0 C4 Capacitor, ceramic, 35 V, X7R, 10%, 1 µF, 0603 Std Std 1 C5 Capacitor, ceramic, 10 V, X7R, 10%, 0.
Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods.
FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
【Important Notice for Users of this Product in Japan】 】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.
EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
