Datasheet

( )
-
= ´ ´
´
IN OUT
OUT
LOAD(LL)
X IN SW
V V
V
1
I
2 L V f
´
= £
p´ ´ ´
C C SW
0
X OUT
R C f
f
2 G L C 3
Control
Logic
and
Driver
L
X
C
OUT
R
LOAD
UDG-10198
9
C
C1
V
IN
14
13
11
SW
DRVH
DRVL
VDDQSNS
G
8
REFIN
6
VREF
+
1.8 V
R
C1
C
C2
R
C2
R1
R2
TPS51916
VDDQ
Σ
+
PWM
TPS51916
www.ti.com SLUSAE1D –DECEMBER 2010–REVISED JUNE 2012
D-CAP2™ Mode Operation
Figure 37 shows simplified model of D-CAP2™ architecture.
Figure 37. Simplified Modulator Using D-CAP2™ Mode
The D-CAP2™ mode in the TPS51916 includes an internal feedback network enabling the use of very low ESR
output capacitor(s) such as multi-layer ceramic capacitors. The role of the internal network is to sense the ripple
component of the inductor current information and combine it with voltage feedback signal. Using R
C1
=R
C2
≡R
C
and C
C1
=C
C2
≡C
C
, 0-dB frequency of the D-CAP2™ mode is given by Equation 3. It is recommended that the 0-
dB frequency (f
0
) be lower than 1/3 of the switching frequency to secure the proper phase margin
where
• G is gain of the amplifier which amplifies the ripple current information generated by the compensation
circuit (3)
The typical G value is 0.25, and typical R
C
C
C
time constant values for 500 kHz and 670 kHz operation are 23 µs
and 14.6 µs, respectively.
For example, when f
SW
=500 kHz and L
X
=1 µH, C
OUT
should be larger than 88 µF.
When selecting the capacitor, pay attention to its characteristics. For MLCC use X5R or better dielectric and
consider the derating of the capacitance by both DC bias and AC bias. When derating by DC bias and AC bias
are 80% and 50%, respectively, the effective derating is 40% because 0.8 x 0.5 = 0.4. The capacitance of
specialty polymer capacitors may change depending on the operating frequency. Consult capacitor
manufacturers for specific characteristics.
Light-Load Operation
In auto-skip mode, the TPS51916 SMPS control logic automatically reduces its switching frequency to improve
light-load efficiency. To achieve this intelligence, a zero cross detection comparator is used to prevent negative
inductor current by turning off the low-side MOSFET. Equation 4 shows the boundary load condition of this skip
mode and continuous conduction operation.
(4)
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