Datasheet

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SLVS426 − MAY 2002
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7
Terminal Functions (Continued)
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
LH1 46 I/O Bootstrap capacitor connection for SBRC-CH1 high-side gate driver.
LH2 34 I/O Bootstrap capacitor connection for SBRC-CH2 high-side gate driver.
LH3 20 I/O Bootstrap capacitor connection for SBRC-CH3 high-side gate driver.
LL1 44 I/O SBRC-CH1 high-side gate driving return. Connect this pin to the junction of the high-side and low-side
MOSFETs for floating drive configuration. This pin is also an input terminal for current comparator.
LL2 36 I/O SBRC-CH2 high-side gate driving return. Connect this pin to the junction of the high-side and low-side
MOSFETs for floating drive configuration. This pin is also an input terminal for current comparator.
LL3 22 I/O SBRC-CH3 high-side gate driving return. Connect this pin to the junction of the high-side and low-side
MOSFETs for floating drive configuration. This pin is also an input terminal for current comparator.
OUT1_d 43 O Gate drive output for SBRC-CH1 low-side MOSFETs
OUT2_d 37 O Gate drive output for SBRC-CH2 low-side MOSFETs
OUT3_d 23 O Gate drive output for SBRC-CH3 low-side MOSFETs
OUT1_u 45 O Gate drive output for SBRC-CH1 high-side MOSFETs.
OUT2_u 35 O Gate drive output for SBRC-CH2 high-side MOSFETs.
OUT3_u 21 O Gate drive output for SBRC-CH3 high-side MOSFETs.
OUTGND1 42 O Ground for SBRC-CH1 MOSFETs drivers. It is connected to the current limiting comparator’s negative input.
OUTGND2 38 O Ground for SBRC-CH2 MOSFETs drivers. It is connected to the current limiting comparator’s negative input.
OUTGND3 24 O Ground for SBRC-CH3 MOSFETs drivers. It is connected to the current limiting comparator’s negative input.
PGOUT 16 O Powergood open drain output. PG comparators monitor all SBRC’s and LDO’s over voltage and under
voltage. The threshold is ±7%. When one of the output is beyond this condition, powergood output goes low.
PG_DELAY 17 I/O Programmable delay for Powergood. Connect an external capacitor between this pin and GND to specify
time delay.
PWM_SEL 6 I PWM or auto PWM/SKIP mode select.
H : auto PWM/SKIP
L : PWM fixed
REF 9 O 0.85-V reference voltage output. This 0.85-V reference voltage is used to set the output voltage and the
reference for the over and undervoltage protections. This reference voltage is dropped down from the internal
5-V regulator.
REG5V_IN 30 I External 5-V input
SS_STBY1 2 I/O Soft start control and stand by control for SBRC-CH1. Connect an external capacitor between this pin and
GND to specify soft start time.
SS_STBY2 5 I/O Soft start control and stand by control for SBRC-CH2. Connect an external capacitor between this pin and
GND to specify soft start time.
SS_STBY3 13 I/O Soft start control and stand by control for SBRC-CH3. Connect an external capacitor between this pin and
GND to specify soft start time.
STBY_LDO 12 I Standby control input for LDO regulator. LDO regulator can be switched into standby mode by grounding the
STBY_LDO pin.
STBY_VREF3.3 11 I Standby control for 3.3-V linear regulator.
STBY_VREF5 10 I Standby control for 5-V linear regulator.
TRIP1 41 I External resistor connection for SBRC-CH1 output current protection control.
TRIP2 39 I External resistor connection for SBRC-CH2 output current protection control.
TRIP3 18 I External resistor connection for SBRC-CH3 output current protection control.
VIN 33 I Supply voltage input
VIN_SENSE12 40 I SBRC-CH1/2 supply voltage monitor for reference of current limit. Input range is 4.5 V to 28 V.
VIN_SENSE3 19 I SBRC-CH 3 supply voltage monitor for reference of current limit. Input range is 4.5 V to 28 V.
VREF3.3 32 O 3.3-V linear regulator output
VREF5 31 O 5-V linear regulator output.