Datasheet
SLVS426 − MAY 2002
www.ti.com
6
PIN ASSIGNMENTS
PT
(TOP VIEW)
13 14 15 16 17 18 19 20 21 22 23 24
25
26
27
28
29
30
31
32
33
34
35
36
48 47 46 45 44 43 42 41 40 39 38 37
1
2
3
4
5
6
7
8
9
10
11
12
INV1
FLT
LH1
OUT1_u
LL1
OUT1_d
OUTGND1
TRIP1
VIN_SENSE12
TRIP2
OUTGND2
OUT2_d
LL2
OUT2_u
LH2
VIN
VREF3.3
VREF5
REG5V_IN
LDO_IN
LDO_CUR
LDO_GATE
LDO_OUT
INV_LDO
FB1
SS_STBY1
INV2
FB2
SS_STBY2
PWM_SEL
CT
GND
REF
STBY_VREF5
STBY_VREF3.3
STBY_LDO
SS_STBY3
FB3
INV3
PGOUT
PG_DELAY
TRIP3
VIN_SENSE3
LH3
OUT3_u
LL3
OUT3_d
OUTGND3
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME NO.
I/O
DESCRIPTION
CT 7 I/O External capacitor from CT to GND adjusts frequency of the triangle oscillator.
FB1 1 O Feedback output of SBRC-CH1 error amplifier
FB2 4 O Feedback output of SBRC-CH2 error amplifier
FB3 14 O Feedback output of SBRC-CH3 error amplifier
FLT 47 I/O Fault latch timer pin. An external capacitor connected between FLT and GND sets FLT enable time up.
GND 8 − Signal GND
INV1 48 I Inverting inputs of SBRC-CH1 error amplifier, skip comparator, OVP1/UVP1 comparator and PG comparator
INV2 3 I Inverting inputs of SBRC-CH2 error amplifier, skip comparator, OVP2/UVP2 comparator and PG comparator
INV3 15 I Inverting inputs of SBRC-CH3 error amplifier, skip comparator, OVP3/UVP3 comparator and PG comparator
INV_LDO 25 I Inverting inputs of LDO error amplifier, OVP/UVP comparators and PG comparator.
LDO_CUR 28 I Current sense input of LDO regulator.
LDO_GATE 27 O Gate control output of external MOSFET for LDO regulator
LDO_OUT 26 I/O LDO regulator’s output connection. If output voltage has an overshoot when output current changes high to
low quickly, it absorbs electrical charge from this pin.
LDO_IN 29 I Supply voltage input and current sense input of LDO regulator