Datasheet


SLVS426 − MAY 2002
www.ti.com
20
SOFT START
The soft start timing can be adjusted by selecting the soft-start capacitor value. The equation is;
C(soft) + 2.3 10
–6
T(soft)
0.85
where C(soft) is the soft-start capacitor (µF) (C05, C07 and C10 in EVM design):
T(soft) is the start-up time (s).
Example: T(soft) = 5 ms, therefore, C(soft) = 0.0135 µF.
CURRENT PROTECTION
The current limit in TPS5130 is set using an internal current source and an external resistor (R17, R23 and R24).
The current limit protection circuit compares the drain to source voltage of the high-side and low-side
MOSFET(s) with respect to the set-point voltage. If the voltage up exceeds the limit during high-side conduction,
the current limit circuit terminates the high-side driver pulse. If the set point voltage is exceeded during low-side
conduction, the low side pulse is extended through the next cycle. Together this action has the effect of
decreasing the output voltage until the under voltage protection circuit is activated and the fault latch is set and
both the high-side and low-side MOSFET drivers are shut off. The equation below should be used for calculating
the external resistor value for current protection set point:
R(cl) +
r
DS(on)
ǒ
I
(trip)
)
I
(ripple)
2
Ǔ
13 10
–6
where R
(cl)
is the external current limit resistor (R17, R23 and R24); r
DS(on)
is the low-side MOSFET(Q02, Q04
and Q06) on-time resistance. I
(trip)
is the required current limit.
Example: r
DS(on)
= 25 mΩ, I
(trip)
= 4 A, I
(ripple)
= 1.57 A, therefore, R
(cl)
= 9.2 kΩ.
It should be noted that r
DS(on)
of a FET is highly dependent on temperature, so to insure full output at maximum
operating temperature, the value of r
DS(on)
in the above equation should be adjusted. For maximum stability,
it is recommended that the high-side MOSFET(s) has the same, or slightly higher r
DS(on)
than the low-side
MOSFET(s). If the low-side MOSFET(s) has a higher r
DS(on)
, in certain low duty cycle applications it may be
possible for the device to regulate at an output current higher than that set by the above equation by increasing
the high-side conduction time to compensate for the missed conduction cycle caused by the extension of the
previous low-side pulse.
TIMER-LATCH
The TPS5130 includes fault latch function with a user adjustable timer to latch the MOSFET drivers in case
of a fault condition. When either the OVP or UVP comparator detect a fault condition, the timer starts to charge
FLT capacitor (C42), which is connected with FLT pin. The circuit is designed so that for any value of FLT
capacitor, the undervoltage latch time t
(uvplatch)
is about 50 times larger than the overvoltage latch time t
(ovplatch)
.
The equations needed to calculate the required value of the FLT capacitor for the desired over and undervoltage
latch delay times are:
C
(lat)
+ 2.3 10
*6
t
(uvplatch)
1.185
and
C
(lat)
+ 125 10
*6
t
(ovplatch)
1.185
where C
(lat
) is the external capacitor, t
(uvplatch)
is the time from UVP detection to latch. t
(ovplatch)
is the time from
OVP detection to latch.
For the EVM, t
(uvplatch)
= 5 ms and t
(ovplatch)
= 0.1 ms, so C
(lat)
= 0.01 µF. If the voltage on the FLT pin reaches
1.185 V, the fault latch is set, and the MOSFET drivers are set as follows: