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User's Guide

SLVU735–June 2012

Dual Synchronous Step-Down Fixed Output Controller

with 5-V and 3.3-V LDOs

The TPS51225EVM-133 evaluation module (EVM) uses the TPS51225. The TPS51225 is a D-CAP™

mode, dual synchronous step down controller with 5- and 3.3-V low-dropout regulators (LDO). The EVM

provides fixed 5- and 3.3-V outputs at up to 10 A each, from a 12-V input bus.

Contents

1 Description ................................................................................................................... 2

1.1 Typical Applications ................................................................................................ 2

1.2 Features ............................................................................................................. 2

2 Electrical Performance Specifications .................................................................................... 3

3 Schematic .................................................................................................................... 4

4 Test Setup ................................................................................................................... 5

4.1 Test Equipment ..................................................................................................... 5

4.2 Recommended Test Setup ....................................................................................... 6

5 Configurations ............................................................................................................... 7

6 Test Procedure .............................................................................................................. 7

6.1 Line/Load Regulation and Efficiency Measurement Procedure .............................................. 7

6.2 List of Test Points .................................................................................................. 8

6.3 Equipment Shutdown .............................................................................................. 8

7 Performance Data and Typical Characteristic Curves ................................................................. 9

7.1 5-V Efficiency ....................................................................................................... 9

7.2 5-V Load Regulation ............................................................................................... 9

7.3 3.3-V Efficiency ................................................................................................... 10

7.4 3.3-V Load Regulation ........................................................................................... 10

7.5 Enable Turn on/Turn off ......................................................................................... 11

7.6 Output Ripple ..................................................................................................... 11

7.7 Switching Node ................................................................................................... 12

7.8 5-V Output Transient with Auto-skip Mode .................................................................... 12

7.9 3.3-V Output Transient with Auto-skip Mode ................................................................. 13

7.10 Output Prebias Turn on .......................................................................................... 13

7.11 Thermal Image .................................................................................................... 14

8 EVM Assembly Drawing and PCB Layout ............................................................................. 15

9 Bill of Materials ............................................................................................................. 18

List of Figures

1 TPS51225EVM-133 Schematic ........................................................................................... 4

2 Tip and Barrel Measurement for Vout Ripple ........................................................................... 5

3 TPS51225EVM-133 Recommended Test Set Up ...................................................................... 6

4 5-V Efficiency ................................................................................................................ 9

5 5-V Load Regulation........................................................................................................ 9

6 3.3-V Efficiency ............................................................................................................ 10

7 3.3-V Load Regulation .................................................................................................... 10

8 EN1 and EN2 Turn on .................................................................................................... 11

9 EN1 and EN2 Turn off .................................................................................................... 11

SLVU735–June 2012 Dual Synchronous Step-Down Fixed Output Controller with 5-V and 3.3-V

LDOs

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Summary of content (27 pages)

PAGE 1
User's Guide SLVU735 – June 2012 Dual Synchronous Step-Down Fixed Output Controller with 5-V and 3.3-V LDOs The TPS51225EVM-133 evaluation module (EVM) uses the TPS51225. The TPS51225 is a D-CAP™ mode, dual synchronous step down controller with 5- and 3.3-V low-dropout regulators (LDO). The EVM provides fixed 5- and 3.3-V outputs at up to 10 A each, from a 12-V input bus. 1 2 3 4 5 6 7 8 9 Contents Description ..........................................................................................
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Description 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 www.ti.com ......................................................................................................... 3.3-V Output Ripple ....................................................................................................... 5-V Switching Node ....................................................................................................... 3.3-V Switching Node ..............................................................
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Electrical Performance Specifications www.ti.com 2 Electrical Performance Specifications Table 1. TPS51225EVM-133 Electrical Performance Specifications PARAMETER TEST CONDITIONS MIN TYP MAX 12 20 UNITS INPUT CHARACTERISTICS Voltage range Vin Maximum input current Vin = 8 V, 5 Vout, 1/10A, 3.3 Vout, 2/10A 8 7.3 V A No load input current Vin = 20 V, 5 Vout, 1/0A, 3.3 Vout, 2/0A with auto-skip mode 1.
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Schematic 3 www.ti.com Schematic Figure 1. TPS51225EVM-133 Schematic 4 Dual Synchronous Step-Down Fixed Output Controller with 5-V and 3.
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Test Setup www.ti.com 4 Test Setup 4.1 Test Equipment Voltage Source: The input voltage, Vin, should be a 0- to 20-V variable DC source capable of supplying 10 Adc. Connect Vin to J1 as shown in Figure 3. Multimeters: V1: Vin at TP1 (Vin) and TP6 (GND). V2: Vout1 at TP2 (Vout1) and TP7 (GND). V3: Vout2 at TP3 (Vout2) and TP8 (GND). A1: Vin input current Output Load: The output load should be an electronic constant resistance mode load capable of 0 to 15 Adc.
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Test Setup 4.2 www.ti.com Recommended Test Setup FAN V2 Load1 + V1 A1 + DC Source Vin - + V3 Load2 - Figure 3. TPS51225EVM-133 Recommended Test Set Up Figure 3 is the recommended test set up for evaluating the EVM. Working at an ESD workstation, make sure that any wrist straps, bootstraps or mats are connected referencing the user to earth ground before power is applied to the EVM. Input Connections: 1.
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Configurations www.ti.com 5 Configurations Make all Switcher selections before applying power to the EVM. Configure this EVM per the following: Enable1 Selection The EN1 pin can be set by S1. Default setting: S1 to OFF to disable the Output1 Table 2. EN1 Selection Switcher set to SKIPSEL Selection ON Enable the Output1 OFF Disable the Output1 Enable2 Selection Default setting: S2 to OFF to disable the Output2 Table 3.
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Test Procedure 6.2 www.ti.com List of Test Points Table 4. The Functions of Each Test Points Test Points 6.3 Name Description TP1 Vin 12-V input TP2 Vout1 5-V output TP3 Vout2 3.3-V output TP4 VREG5 5-V LDO output TP5 VREG3 3.
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Performance Data and Typical Characteristic Curves www.ti.com 7 Performance Data and Typical Characteristic Curves Figure 4 through Figure 20 present typical performance curves for TPS51225EVM-133. 7.1 5-V Efficiency 100 90 Efficiency (%) 80 70 60 50 VIN = 12 V VIN = 20 V VIN = 8 V 40 0.001 0.01 0.1 Output Current (A) 1 10 G001 Figure 4. 5-V Efficiency 7.2 5-V Load Regulation 5.08 Output Voltage (V) 5.06 5.04 5.02 5 4.98 VIN = 12 V VIN = 20 V VIN = 8 V 4.96 0.001 0.01 0.
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Performance Data and Typical Characteristic Curves 7.3 www.ti.com 3.3-V Efficiency 100 90 80 Efficiency (%) 70 60 50 40 30 20 VIN = 12 V VIN = 20 V VIN = 8 V 10 0 0.001 0.01 0.1 Output Current (A) 1 10 G003 Figure 6. 3.3-V Efficiency 7.4 3.3-V Load Regulation 3.38 Output Voltage (V) 3.36 3.34 3.32 3.3 3.28 VIN = 12 V VIN = 20 V VIN = 8 V 3.26 0.001 0.01 0.1 Output Current (A) 1 10 G004 Figure 7. 3.
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Performance Data and Typical Characteristic Curves www.ti.com 7.5 Enable Turn on/Turn off TPS5 1225 EVM-133 Enable Start-up Test Condition: 12 VIN, 5 V/5 A, 3.3 V/5 A CH1: EN TPS5 1225 EVM-133 Enable Shutdown Test Condition: 12 VIN, 5 V/5 A, 3.3 V/5 A CH1: EN CH2: 5 VOUT CH2: 5 VOUT CH3: 3.3 VOUT CH3: 3.3 VOUT CH4: PGOOD CH4: PGOOD TIME 400 µs/Div TIME 400 µs/Div Figure 8. EN1 and EN2 Turn on 7.6 Figure 9.
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Performance Data and Typical Characteristic Curves 7.7 www.ti.com Switching Node TP5 1225 EVM-133 5 VOUT Switching Node TPS5 1225 EVM-133 3.3 VOUT Switching Node Test Condition: 12 VIN, 5 V/10 A, 3.3 V/0 A CH1: SW2 CH1: SW1 TIME 400 ns/Div TIME 200 ns/Div Figure 12. 5-V Switching Node 7.8 Figure 13. 3.3-V Switching Node 5-V Output Transient with Auto-skip Mode TPS5 1225CEVM-133 5 VOUT Output Transient from DCM to CCM Test Condition: 12 VIN, 5 V/0 A-5 A, 3.
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Performance Data and Typical Characteristic Curves www.ti.com 7.9 3.3-V Output Transient with Auto-skip Mode TPS5 1225CEVM-133 Test Condition: 3.3 VOUT Output Transient 12 VIN, 5 V/0 A, 3.3 V/0 A-5 A from DCM to CCM TPS5 1225 EVM-133 3.3 VOUT Output Transient from CCM to DCM CH1: 3.3 VOUT Output CH1: 3.3 VOUT Output CH2: 3.3 VOUT Current CH2: 3.3 VOUT Current Test Condition: 12 VIN, 5 V/0 A, 3.3 V/0 A-5 A TIME 40 µs/Div TIME 40 µs/Div Figure 16. 3.
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Performance Data and Typical Characteristic Curves www.ti.com 7.11 Thermal Image Figure 20. Top Board at 12 Vin, 5 V/10 A, 3.3 V/10 A, 25°C Ambient without Airflow 14 Dual Synchronous Step-Down Fixed Output Controller with 5-V and 3.
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EVM Assembly Drawing and PCB Layout www.ti.com 8 EVM Assembly Drawing and PCB Layout The following figures (Figure 21 through Figure 26) show the design of the TPS51225EVM-133 printed circuit board. The EVM has been designed using 4 Layers, 2 oz copper circuit board. Figure 21. TPS51225EVM-133 Top Layer Assembly Drawing Figure 22. TPS51225EVM-133 Bottom Assembly Drawing SLVU735 – June 2012 Submit Documentation Feedback Dual Synchronous Step-Down Fixed Output Controller with 5-V and 3.
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EVM Assembly Drawing and PCB Layout www.ti.com Figure 23. TPS51225EVM-133 Top Copper Figure 24. TPS51225EVM-133 Layer 2 Copper 16 Dual Synchronous Step-Down Fixed Output Controller with 5-V and 3.
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EVM Assembly Drawing and PCB Layout www.ti.com Figure 25. TPS51225EVM-133 Layer 3 Copper Figure 26. TPS51225EVM-133 Layer 4 Copper SLVU735 – June 2012 Submit Documentation Feedback Dual Synchronous Step-Down Fixed Output Controller with 5-V and 3.
PAGE 18
Bill of Materials 9 www.ti.com Bill of Materials This is the EVM components list according to the schematic shown in Figure 1. Table 5. EVM Components List Qty 18 RefDes Description MFR Part Number 4 C1, C2, C3, C4 Capacitor, ceramic, 22 µF, 25 V, X5R, 20%, 1210 Murata GRM32ER61C226KE20L 6 C10, C15, C19, C20, C21, C22 Capacitor, ceramic, 0.1 µF, 50 V, X7R, 10%, 0603 STD STD 4 C5, C6, C26, C27 Capacitor, ceramic, 0.
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EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods.
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FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
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【Important Notice for Users of this Product in Japan】】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.
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EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use.
PAGE 23
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods.
PAGE 24
FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
PAGE 25
【Important Notice for Users of this Product in Japan】】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.
PAGE 26
EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.