Datasheet

VIN

Control

logic

Driver

DRVH

DRVL

CSP

CSN

Ex-resistor

Lx(ESL)

Cx Rx +

Cc + Co

ESR

Rgv

Time

VFB

signal

VFB

RIPPLE RIPPLE

=Vo x1/Vout

30mV

t =1/f

SW SW

TPS51220A

www.ti.com

SLUS897E –DECEMBER 2008–REVISED JANUARY 2013

Figure 46. Required voltage feedback ramp signal

7. Calculate Cc. The purpose of this capacitance is to cancel zero caused by ESR of the output capacitor. If

ceramic capacitor(s) is used, there is no need for Cc. If a combination of different capacitors is used, attach a

RC network circuit instead of single capacitance to cancel zeros and poles caused by the output capacitors.

With single capacitance, Cc is given in Equation 17.

(17)

For D-CAP mode, basically Cc is not needed.

8. Choose MOSFETs Generally, the on resistance affects efficiency at high load conditions as conduction loss.

For a low output voltage application, the duty ratio is not high enough so that the on resistance of high-side

MOSFET does not affect efficiency; however, switching speed (t

and t

) affects efficiency as switching loss.

As for low-side MOSFET, the switching loss is usually not a main portion of the total loss.

RESISTOR CURRENT SENSING

For more accurate current sensing with an external resistor, the following technique is recommended. Adding an

RC filter to cancel the parasitic inductance of resistor, this filter value is calculated using Equation 18.

(18)

This equation means time-constant of Cx and Rx should match the one of Lx (ESL) and Rs.

Figure 47. External Resistor Current Sensing

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