Datasheet

TPS51219
DL
10
VIN
MODE GND
V5
9
V
OUT
VSNS
8
7
PGND
COMP
4
2
1
VREF
UDG-11012
REFIN
3
GSNS
155
10 nF
2.2 mF
#1
#2
#3
PwrPad
6
TRIP
VSNS
GSNS
0.1 mF
10 nF
TPS51219
SLUSAG1B MARCH 2011 REVISED OCTOBER 2011
www.ti.com
Layout Considerations
Certain issues must be considered before designing a layout using the TPS51219.
Figure 30. DC/DC Converter Ground System
V
IN
capacitor(s), V
OUT
capacitor(s) and MOSFETs are the power components and should be placed on one
side of the PCB (solder side). Other small signal components should be placed on another side (component
side). At least one inner plane should be inserted, connected to ground, in order to shield and isolate the
small signal traces from noisy power lines.
All sensitive analog traces and components such as VSNS, COMP, MODE, REFIN, VREF and TRIP should
be placed away from high-voltage switching nodes such as SW, DH, DL or BST to avoid coupling. Use
internal layer(s) as ground plane(s) and shield feedback trace from power traces and components.
The DC/DC converter has several high-current loops. The area of these loops should be minimized in order to
suppress generating switching noise.
Loop #1. The most important loop to minimize the area of is the path from the V
IN
capacitor(s) through the
high and low-side MOSFETs, and back to the capacitor(s) through ground. Connect the negative node of
the V
IN
capacitor(s) and the source of the low-side MOSFET at ground as close as possible. (Refer to loop
#1 of Figure 30)
Loop #2. The second important loop is the path from the low-side MOSFET through inductor and V
OUT
capacitor(s), and back to source of the low-side MOSFET through ground. Connect source of the low-side
MOSFET and negative node of V
OUT
capacitor(s) at ground as close as possible. (Refer to loop #2 of
Figure 30)
Loop #3. The third important loop is of gate driving system for the low-side MOSFET. To turn on the
low-side MOSFET, high current flows from V5 capacitor through gate driver and the low-side MOSFET,
and back to negative node of the capacitor through ground. To turn off the low-side MOSFET, high current
flows from gate of the low-side MOSFET through the gate driver and PGND, and back to source of the
low-side MOSFET through ground. Connect negative node of V5 capacitor, source of the low-side
MOSFET and PGND at ground as close as possible. (Refer to loop #3 of Figure 30)
Connect the PGND and GND pins directly at the device.
24 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated