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EVM Assembly Drawing and PCB Layout www.ti.com
Figure 29. TPS51206EVM-745 Bottom Layer
Figure 30. TPS51206EVM-745 Bottom Layer Assembly
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Using the TPS51206EVM-745, 2-A Peak Sink/Source DDR Termination SLUU515–August 2011
Regulator With VTTREF Buffered Reference for DDR2, DDR3, DDR3L, and
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