Datasheet

0.64
0.65
0.66
0.67
0.68
0.69
0.7
VTT - Output Voltage - V
-1.5 -1 -0.5 0 0.5 1 1.5
IVTT - Output Current - A
V = 3.3 V
I
V = 5 V
I
0.56
0.57
0.58
0.59
0.6
0.61
0.62
0.63
VTT - Output Voltage - V
-1.5 -1 -0.5 0 0.5 1 1.5
IVTT - Output Current - A
V = 3.3 V
I
V = 5 V
I
Performance Data and Typical Characteristic Curves www.ti.com
Figure 6. DDR3L (0.675VTT) Load Regulation
Figure 7. DDR4 (0.6VTT) Load Regulation
12
Using the TPS51206EVM-745, 2-A Peak Sink/Source DDR Termination SLUU515–August 2011
Regulator With VTTREF Buffered Reference for DDR2, DDR3, DDR3L, and
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