Datasheet

2
3
4
5
1
9
8
7
6
10
TPS51200
REFIN
VLDOIN
VO
PGND
VOSNS
VIN
PGOOD
GND
EN
REFOUT
R3
100 kW
3.3 V
IN
PGOOD
SLP_S3
C5
0.1 mF
VTTREF
V
VLDOIN
= V
VDDQ
= 1.8 V
V
VTT
= 0.9 V
C4
1000 pF
R1
10 kW
V
VDDQ
= 1.8 V
R2
10 kW
UDG-08028
C6
4.7 mF
C8
10 mF
C7
10 mF
C3
10 mF
C2
10 mF
C1
10 mF
TPS51200-Q1
SLUS984A –NOVEMBER 2009–REVISED APRIL 2012 www.ti.com
DESIGN EXAMPLES
Design Example 1
This design example describes a 3.3-V
IN
, DDR2 Configuration
Figure 25. 3.3-V
IN
, DDR2 Configuration
Table 2. Design Example 1 List of Materials
REFERENCE
DESCRIPTION SPECIFICATION PART NUMBER MANUFACTURER
DESIGNATOR
R1, R2 10 kΩ
Resistor
R3 100 kΩ
C1, C2, C3 10 μF, 6.3 V GRM21BR70J106KE76L Murata
C4 1000 pF
C5 Capacitor 0.1 μF
C6 4.7 μF, 6.3 V GRM21BR60J475KA11L Murata
C7, C8 10 μF, 6.3 V GRM21BR70J106KE76L Murata
22 Copyright © 2009–2012, Texas Instruments Incorporated
Product Folder Link(s): TPS51200-Q1