Datasheet

7 EVM Assembly
www.ti.com EVM Assembly
A Test condition: VTT Sink/Source 1 A, VTT A Test Condition: V
VIN
=3.3 V,
transient load regulation: 22 mV, Test point: V
VDDQ
=V
VLDOIN
=1.5 V, V
VTT
=V
VTTREF
=0.75
VTT TP7 (+) and TP6 (–) V, I
VTT
=1 A
Source Test Results: Phase margin: 43.8 ° ,
Figure 9. DDR3 VTT Sink/Source Transient
Gain margin: 20.19 dB, Crossover
frequency: 869.75 kHz
Figure 10. Bode Plot for DDR3 Application
The following figures (Figure 11 through Figure 14 ) show the design of the TPS51200EVM printed circuit
board. The EVM has been designed using 2-Layer, 2-oz. copper-clad circuit board containing all
components on the bottom side.
Figure 11. Bottom Side Silkscreen (Top View)
SLUU323 – JUNE 2008 Using theTPS51200 EVM Sink/Source DDR Termination Regulator 15
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