Datasheet
TPS51125
SLUS786G –OCTOBER 2007–REVISED JUNE 2012
www.ti.com
DEVICE INFORMATION
Table 1. TERMINAL FUNCTIONS TABLE
TERMINAL
I/O DESCRIPTION
NAME NO.
VIN 16 I High voltage power supply input for 5-V/3.3-V LDO.
GND 15 - Ground.
3.3-V power supply output. Connect 10-μF ceramic capacitor to Power GND near the device. A 1-μF
VREG3 8 O
ceramic capacitor is acceptable when not loaded.
VREG5 17 O 5-V power supply output. Connect 33-μF ceramic capacitor to Power GND near the device.
VREF 3 O 2-V reference voltage output. Connect 220-nF to 1-μF ceramic capacitor to Signal GND near the device.
Master enable input.
Open : LDOs on, and ready to turn on VCLK and switcher channels.
EN0 13 I/O
620 kΩ to GND : enable both LDOs, VCLK off and ready to turn on switcher channels. Power
consumption is almost the same as the case of VCLK = ON.
GND : disable all circuit
ENTRIP1 1 Channel 1 and Channel 2 enable and OCL trip setting pins.Connect resistor from this pin to GND to set
I/O
threshold for synchronous R
DS(on)
sense. Short to ground to shutdown a switcher channel.
ENTRIP2 6
VO1 24 Output connection to SMPS. These terminals work as fixed voltage inputs and output discharge inputs.
I/O
VO1 and VO2 also work as 5 V and 3.3 V switch over return power input respectively.
VO2 7
VFB1 2 SMPS feedback inputs. Connect with feedback resistor divider.
I
VFB2 5
PGOOD 23 O Power Good window comparator output for channel 1 and 2. (Logical AND)
Selection pin for operation mode:
OOA auto skip : Connect to VREG3 or VREG5
SKIPSEL 14 I
Auto skip : Connect to VREF
PWM only : Connect to GND
On-time adjustment pin.
365 kHz/460 kHz setting : connect to VREG5
TONSEL 4 I 300 kHz/375 kHz setting : connect to VREG3
245 kHz/305 kHz setting : connect to VREF
200 kHz/250 kHz setting : connect to GND
DRVL1 19 Low-side N-channel MOSFET driver outputs. GND referenced drivers.
O
DRVL2 12
VBST1 22 Supply input for high-side N-channel MOSFET driver (boost terminal).
I
VBST2 9
DRVH1 21 High-side N-channel MOSFET driver outputs. LL referenced drivers.
O
DRVH2 10
LL1 20 Switch node connections for high-side drivers, current limit and control circuitry.
I
LL2 11
VCLK 18 O 270-kHz clock output for 15-V charge pump.
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