Datasheet

Driver and switch node traces are shown for CH1 only.
*
Cin
Cin
L
L
Vout1
HS-MOSFET
LS-MOSFET
HS-MOSFET
Vout2
Cout
To CH1 Vout divider
To CH2 Vout divider
To VO2
To VO1
LS-MOSFET
Bottom Layer
VIN
GND
Connection to GND island
Connection to GND
Connection of Vout
Top Layer
TPS51123
C
VREF
CH1 Vout divider
C
VREG5
DRVH1*
LL1*
DRVL1*
Through hole
CH2 Vout divider
Connection to
GND island
GND
Inner Layer
C
VREG3
Cout
GND island
TPS51123
www.ti.com SLUS890E –DECEMBER 2008–REVISED JANUARY 2013
Figure 38. PCB Layout
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