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D-CAP™ Mode Operation
f
0
+
1
2p ESR C
O
v
f
SW
3
(19)
ESR +
V
OUT
0.015
I
RIPPLE
(20)
TPS51120
SLUS670B JULY 2005 REVISED FEBRUARY 2007
A buck converter system using D-CAP™ mode can be simplified as shown in Figure 2 .
Figure 2. Linearizing the Modulator
The VO voltage is compare with internal reference voltage after divider resistors (Internal resistor mode. For
adjustable mode, the comparison is directly at VFB). The PWM comparator determines the timing to turn on top
MOSFET. The gain and speed of the comparator is high enough to keep the voltage at the beginning of each on
cycle (or the end of off cycle) substantially constant. The DC output voltage may have line regulation due to
ripple amplitude that slightly increases as the input voltage increase.
For the loop stability, the 0-dB frequency, f
0
, defined below need to be lower than 1/3 of the switching frequency.
As f
0
is determined solely by the output capacitor’s characteristics, loop stability of D-CAP™ mode is determined
by the capacitor’s chemistry. For example, specialty polymer capacitors (SP-CAP) have Co in the order of
several 100 µ F and ESR in range of 10 m . These produce an f
0
in the order of 100 kHz or less and the loop is
stable. However, ceramic capacitors have f
0
at more than 700 kHz, which is not suitable for this operational
mode.
Although D-CAP™ mode provides many advantages such as ease-of-use, minimum external components
configuration and extremely short response time, due to not employing an error amplifier in the loop, sufficient
amount of feedback signal needs to be provided by external circuit to reduce jitter level. The required signal
level is approximately 15 mV at comparing point, either the internal or external VFB voltages. The output
capacitor’s ESR should meet this requirement.
The external components selection is much simple in D-CAP™ mode.
1. Choose inductor based on frequency and acceptable ripple current.
2. Choose output capacitor(s).Organic semiconductor capacitor(s) or specialty polymer capacitor(s) are
recommended. Determine ESR to meet required ripple voltage above. A quick approximation is shown in
Equation 20 .
21
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