Datasheet
VDDQ SMPS, Light Load Condition
I
OUT(LL)
+
1
2 L f
(V
IN
* V
OUT
) V
OUT
V
IN
(1)
Low-Side Driver
High-Side Driver
Current Sensing Scheme
TPS51116
www.ti.com
................................................................................................................................................................ SLUS609H – MAY 2004 – REVISED JULY 2009
TPS51116 automatically reduces switching frequency at light load condition to maintain high efficiency. This
reduction of frequency is achieved smoothly and without increase of V
OUT
ripple or load regulation. Detail
operation is described as follows. As the output current decreases from heavy load condition, the inductor current
is also reduced and eventually comes to the point that its valley touches zero current, which is the boundary
between continuous conduction and discontinuous conduction modes. The rectifying MOSFET is turned off when
this zero inductor current is detected. As the load current further decreased, the converter runs in discontinuous
conduction mode and it takes longer and longer to discharge the output capacitor to the level that requires next
ON cycle. The ON-time is kept the same as that in the heavy load condition. In reverse, when the output current
increase from light load to heavy load, switching frequency increases to the constant 400 kHz as the inductor
current reaches to the continuous conduction. The transition load point to the light load operation I
OUT(LL)
(i.e. the
threshold between continuous and discontinuous conduction mode) can be calculated in Equation 1 :
where
• f is the PWM switching frequency (400 kHz)
Switching frequency versus output current in the light load condition is a function of L, f, V
IN
and V
OUT
, but it
decreases almost proportional to the output current from the I
OUT(LL)
given above. For example, it is 40 kHz at
I
OUT(LL)
/10 and 4 kHz at I
OUT(LL)
/100.
The low-side driver is designed to drive high-current, low-R
DS(on)
, N-channel MOSFET(s). The drive capability is
represented by its internal resistance, which are 3 Ω for V5IN to DRVL and 0.9 Ω for DRVL to PGND. A
dead-time to prevent shoot through is internally generated between top MOSFET off to bottom MOSFET on, and
bottom MOSFET off to top MOSFET on. 5-V bias voltage is delivered from V5IN supply. The instantaneous drive
current is supplied by an input capacitor connected between V5IN and GND. The average drive current is equal
to the gate charge at V
GS
= 5 V times switching frequency. This gate drive current as well as the high-side gate
drive current times 5 V makes the driving power which needs to be dissipated from TPS51116 package.
The high-side driver is designed to drive high-current, low-R
DS(on)
N-channel MOSFET(s). When configured as a
floating driver, 5-V bias voltage is delivered from V5IN supply. The average drive current is also calculated by the
gate charge at V
GS
= 5V times switching frequency. The instantaneous drive current is supplied by the flying
capacitor between VBST and LL pins. The drive capability is represented by its internal resistance, which are 3 Ω
for VBST to DRVH and 0.9 Ω for DRVH to LL.
In order to provide both good accuracy and cost effective solution, TPS51116 supports both of external resistor
sensing and MOSFET R
DS(on)
sensing. For resistor sensing scheme, an appropriate current sensing resistor
should be connected between the source terminal of the bottom MOSFET and PGND. CS pin is connected to the
MOSFET source terminal node. The inductor current is monitored by the voltage between PGND pin and CS pin.
For R
DS(on)
sensing scheme, CS pin should be connected to V5IN (PWP), or V5FILT (RGE) through the trip
voltage setting resistor, R
TRIP
. In this scheme, CS terminal sinks 10- µ A I
TRIP
current and the trip level is set to the
voltage across the R
TRIP
. The inductor current is monitored by the voltage between PGND pin and LL pin so that
LL pin should be connected to the drain terminal of the bottom MOSFET. I
TRIP
has 4500ppm/ ° C temperature
slope to compensate the temperature dependency of the R
DS(on)
. In either scheme, PGND is used as the positive
current sensing node so that PGND should be connected to the proper current sensing device, i.e. the sense
resistor or the source terminal of the bottom MOSFET.
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