Datasheet
1
FEATURES
DESCRIPTION
APPLICATIONS
S5
PGOOD
VREF
0.9 V
10 mA
VTT
0.9 V
2 A
TPS51116RGE
20 19
18
17
VBST DRVH LL DRVL
V5FILT
VLDOIN
VTTGND
VTTSNS
7 8
VTT
CS_GND
9 10
VDDQSET
CS
VDDQSNS
16
15
14
13PGOOD
1211
S5S3
GND
MODE
VTTREF
COMP
NC NC
V5IN
PGND
22 2124 23
1
2
3
4
5
6
C1
5V_IN
VDDQ
1.8 V
10 A
VIN
M1
M2
S3
L1
IRF7832
IRF7821
C4
C3
Ceramic
2y10 µF
Ceramic
0.033 µF
Ceramic
0.1 µF
1 µH
C6
SP−CAP
2y150 µF
C5
Ceramic
2y10 µF
C2
Ceramic
1 µF
C7
Ceramic
1 µF
R2
100 kΩ
R1
5.1 kΩ
R3
5.1 Ω
UDG−04153
TPS51116
www.ti.com
................................................................................................................................................................ SLUS609H – MAY 2004 – REVISED JULY 2009
COMPLETE DDR, DDR2 AND DDR3 MEMORY POWER SOLUTION
SYNCHRONOUS BUCK CONTROLLER, 3-A LDO, BUFFERED REFERENCE
2
• Synchronous Buck Controller (VDDQ)
– Wide-Input Voltage Range: 3.0-V to 28-V
The TPS51116 provides a complete power supply for
DDR/SSTL-2, DDR2/SSTL-18, and DDR3 memory
– D − CAP™ Mode with 100-ns Load Step
systems. It integrates a synchronous buck controller
Response
with a 3-A sink/source tracking linear regulator and
– Current Mode Option Supports Ceramic
buffered low noise reference. The TPS51116 offers
Output Capacitors
the lowest total solution cost in systems where space
is at a premium. The TPS51116 synchronous
– Supports Soft-Off in S4/S5 States
controller runs fixed 400kHz pseudo-constant
– Current Sensing from R
DS(on)
or Resistor
frequency PWM with an adaptive on-time control that
– 2.5-V (DDR), 1.8-V (DDR2), Adjustable to
can be configured in D-CAP™ Mode for ease of use
1.5-V (DDR3) or Output Range 0.75-V to
and fastest transient response or in current mode to
3.0-V
support ceramic output capacitors. The 3-A
sink/source LDO maintains fast transient response
– Equipped with Powergood, Overvoltage
only requiring 20- µ F (2 × 10 µ F) of ceramic output
Protection and Undervoltage Protection
capacitance. In addition, the LDO supply input is
• 3-A LDO (VTT), Buffered Reference (VREF)
available externally to significantly reduce the total
– Capable to Sink and Source 3 A
power losses. The TPS51116 supports all of the
sleep state controls placing VTT at high-Z in S3
– LDO Input Available to Optimize Power
(suspend to RAM) and discharging VDDQ, VTT and
Losses
VTTREF (soft-off) in S4/S5 (suspend to disk).
– Requires only 20- µ F Ceramic Output
TPS51116 has all of the protection features including
Capacitor
thermal shutdown and is offered in both a 20-pin
HTSSOP PowerPAD™ package and 24-pin 4 ״ QFN.
– Buffered Low Noise 10-mA VREF Output
– Accuracy 20 mV for both VREF and VTT
– Supports High-Z in S3 and Soft-Off in S4/S5
• DDR/DDR2/DDR3/LPDDR3 Memory Power
– Thermal Shutdown
Supplies
• SSTL-2 SSTL-18 and HSTL Termination
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2 D-CAP, PowerPAD are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004 – 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.