Datasheet
Table Of Contents
- FEATURES
- DESCRIPTION
- APPLICATIONS
- ABSOLUTE MAXIMUM RATINGS
- DISSIPATION RATINGS
- RECOMMENDED OPERATING CONDITIONS
- ELECTRICAL CHARACTERISTICS
- DEVICE INFORMATION
- DETAILED DESCRIPTION
- VDDQ SMPS, Dual PWM Operation Modes
- VDDQ SMPS, Light Load Condition
- Low-Side Driver
- High-Side Driver
- Current Sensing Scheme
- PWM Frequency and Adaptive On-Time Control
- VDDQ Output Voltage Selection
- VTT Linear Regulator and VTTREF
- Controling Outputs Using the S3 and S5 Pins
- Soft-Start and Powergood
- VDDQ and VTT Discharge Control
- Current Protection for VDDQ
- Current Protection for VTT
- Overvoltage and Undervoltage Protection for VDDQ
- V5IN (PWP), V5FILT (RGE) Undervoltage Lockout (UVLO) Protection
- V5IN (PWP), V5FILT (RGE) Input Capacitor
- Thermal Shutdown
- APPLICATION INFORMATION
- TYPICAL CHARACTERISTICS

O
C2
C
C ESR
C
R
´
=
w
z2
+
1
ǒ
C
O
ESR
Ǔ
+ w
p3
+
1
ǒ
C
C2
R
C
Ǔ
R
C
+ 2.8 V
OUT
C
O
[mF] R
S
[mW]
R
C
v 2p f
0
V
OUT
0.75
C
O
gm
R
S
I
IND(peak)
+
V
TRIP
R
DS(on)
)
1
L f
ǒ
V
IN(max)
* V
OUT
Ǔ
V
OUT
V
IN(max)
L +
1
I
IND(ripple)
f
ǒ
V
IN(max)
* V
OUT
Ǔ
V
OUT
V
IN(max)
+
2
I
OUT(max)
f
ǒ
V
IN(max)
* V
OUT
Ǔ
V
OUT
V
IN(max)
f
0
+
1
2p
R1
R1 ) R2
gm
C
O
R
C
R
S
+
1
2p
0.75
V
OUT
gm
C
O
R
C
R
S
w
Z2
+
1
ǒ
C
O
ESR
Ǔ
w
Z1
+
1
ǒ
C
C
R
C
Ǔ
w
P3
+
1
ǒ
C
C2
R
C
Ǔ
TI Information — Selective Disclosure
TPS51116
SLUS609I –MAY 2004–REVISED JANUARY 2014
www.ti.com
(12)
(13)
(14)
Usually, each frequency of those poles and zeros is lower than the 0 dB frequency, f
0
. However, the f
0
should be
kept under 1/3 of the switching frequency to avoid effect of switching circuit delay. The f
0
is given by Equation 15.
(15)
Based on small signal analysis above, the external components can be selected by following manner.
1. Choose the inductor. The inductance value should be determined to give the ripple current of
approximately 1/4 to 1/2 of maximum output current.
(16)
The inductor also needs to have low DCR to achieve good efficiency, as well as enough room above peak
inductor current before saturation. The peak inductor current can be estimated as shown in Equation 17.
(17)
2. Choose rectifying (bottom) MOSFET. When R
DS(on)
sensing scheme is selected, the rectifying MOSFET’s
on-resistance is used as this R
S
so that lower R
DS(on)
does not always promise better performance. In order
to clearly detect inductor current, minimum R
S
recommended is to give 15 mV or larger ripple voltage with
the inductor ripple current. This promises smooth transition from CCM to DCM or vice versa. Upper side of
the R
DS(on)
is of course restricted by the efficiency requirement, and usually this resistance affects efficiency
more at high-load conditions. When using external resistor current sensing, there is no restriction for low
R
DS(on)
. However, the current sensing resistance R
S
itself affects the efficiency
3. Choose output capacitor(s). When organic semiconductor capacitors (OS-CON) or specialty polymer
capacitors (SP-CAP) are used, ESR to achieve required ripple value at stable state or transient load
conditions determines the amount of capacitor(s) need, and capacitance is then enough to satisfy stable
operation. The peak-to-peak ripple value can be estimated by ESR times the inductor ripple current for stable
state, or ESR times the load current step for a fast transient load response. When ceramic capacitor(s) are
used, the ESR is usually small enough to meet ripple requirement. In contrast, transient undershoot and
overshoot driven by output capacitance becomes the key factor in determining the capacitor(s) required.
4. Determine f
0
and calculate R
C
using Equation 18. Note that higher R
C
shows faster transient response in
cost of unstableness. If the transient response is not enough even with high R
C
value, try increasing the out
put capacitance. Recommended f
0
is f
OSC
/4. Then R
C
can be derived by Equation 19.
(18)
(19)
5. Calculate C
C2
. Purpose of this capacitance is to cancel zero caused by ESR of the output capacitor. When
ceramic capacitor(s) are used, no need for C
C2
.
(20)
(21)
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