Datasheet

5 Test Set-Up
-
+
V
TT
0-5V
LOAD2
1.25V/0.9V
@3A
-
+
-
+
V
DD
4.75-5.25V
FAN
LOAD1
2.5V/1.8V
@10A
-
+
V
IN
3-28V
-
+
LOAD3
1.25V/
0.9V@
<10mA
-
+
V2
A2
V1
A1
A5
V5
V4
V3
5.1 DC Power Source (V
IN
)
5.2 5-V DC Power Source (V
DD
)
www.ti.com Test Set-Up
Figure 3 shows the basic test set up recommended to evaluate the TPS51116EVM. Please note that
although all grounds are common, their connections should remain separate as noted in Figure 3 .
Figure 3. TPS51116EVM Test and Evaluation Setup
V
IN
should be a DC voltage source capable of delivering between 0 VDC and 30 VDC and between 0 A
and 10A with a power handling capability of at least 35 W. V
IN
should be connected between pins VIN and
VIN_GND. V
IN
supplies power to the switching regulator.
V
DD
should be a DC voltage source capable of delivering 5 V at 500 mA with a power handling capability
of at least 2.5 W. V
DD
should be connected between pins V5IN and V5IN_GND. VDD supplies the
TPS51116 operating current, powers the S3 and S5 sleep state switches and the JP1 through JP4
configuration jumpers.
SLUU202A – SEPTEMBER 2004 – Revised November 2008 Using the TPS51116EVM 9
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