Datasheet

5.3 Termination Voltage Source (V
TT
)
5.4 Core Voltage Load (LOAD1)
5.5 Termination Voltage Load (LOAD2)
5.6 Memory Cell Reference Voltage Load (LOAD3)
5.7 Fan
Test Set-Up www.ti.com
V
TT
source is used to test the sink capability of the VTT LDO. V
TT
must be able to source 3 A of current at
5 V. A diode should be placed in series with V
TT
to prevent current from flowing into V
TT
. V
TT
should be
connected between pins Vtt and Vtt_GND. V
TT
and LOAD3 should never be powered on at the same time.
LOAD1 should be an electronic load set in constant current mode capable of sinking between 0 A and
10A at 2.5 V (DDR Mode) or 1.8 V (DDR2 Mode). LOAD1 should be connected between pins VDDQ and
VDDQ_GND.
LOAD2 should be an electronic load set in constant current mode capable of sinking between 0 A and 3 A
of current at 1.25 V (DDR Mode) or 0.9 V (DDR2 Mode). LOAD2 should be connected between pins Vtt
and Vtt_GND. LOAD2 and V
TT
should never be powered on at the same time.
LOAD3 should be an electronic or resistive load sinking less than 10 mA from the V
VTTREF
of 1.25 V (DDR
Mode) or 0.9 V (DDR2 Mode). LOAD3 should be connected between pins Vtt_Ref and V5IN_GND.
This converter includes components that can get hot to the touch. Because this EVM is not enclosed to
allow probing of circuit nodes, a small fan capable of between 200 LFM and 400 LFM is recommended to
reduce component temperatures when operating the evaluation module.
Using the TPS51116EVM10 SLUU202A – SEPTEMBER 2004 – Revised November 2008
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