Datasheet

4.2 Equipment Setup
4.2.1 Electrostatic Discharge Warning
4.2.2 Input Connections
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+
- +-
+
V IN
V1 V2 V3
V IN 5
V IN 3.3
+
-
V4
+
-
V5
LOAD1LO AD2
V7
V6
Test Setup www.ti.com
CAUTION
Failure to observe proper ESD handling procedures may result in damage to
the EVM components.
Many of the components used in the assembly of the TPS51103EVM are susceptible to damage by
electrostatic discharge (ESD). Customers are advised to observe proper ESD handling procedures when
unpacking and handling the TPS51103EVM. All handling should be performed at an approved ESD
workstation or test bench, using a grounded wrist strap. Failure to observe proper handling procedures
may result in damage to EVM components. An electrostatic smock and safety glasses should also be
worn.
Figure 2 shows the recommended test setup to evaluate the TPS51103EVM.
Before connecting the dc input sources, make sure that all sources are initially set to 0 V and connected
as shown in Figure 2 .
Figure 2. TPS51103EVM Recommended Test Setup
Using the TPS51103EVM Integrated 3.3-V/5-V Power LDO with Clock Output6 SLUU303A – JUNE 2008 – Revised SEPTEMBER 2008
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