Datasheet

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SLUS564C − JULY 2003 − REVISED OCTOBER 2008
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INV1
COMP1
SSTRT1
SKIP
VO1_VDDQ
DDR
GND
REF_X
ENBL1
ENBL2
VO2
PGOOD
SSTRT2
COMP2
INV2
VBST1
OUT1_U
LL1
OUT1_D
OUTGND1
TRIP1
VIN
TRIP2
VREG5
REG5_IN
OUTGND2
OUT2_D
LL2
OUT2_U
VBST2
TSSOP (0.5 mm)
DBT PACKAGE
(TOP VIEW)
ELECTRICAL CHARACTERISTICS
T
A
= −40°C to 85°C, 4.5 V < V
IN
< 20 V, C
VIN
= 0.1 µF, C
VREG5
= 2.2 µF, C
REF_X
= 0.01 µF, PGOOD = 0.2 V, ENBLx = DDR = VIN,
INVx = COMPx, RSSTRTx = OPEN, TRIP1 = TRIP2 = VIN, LLx = GND, VBSTx = LLx+5, C
(OUTx_U, OUTx_D)
=1 nF, REG5_IN = 0V, GND =
OUTGNDx = 0 V, VO1_VDDQ = VO2 = 0 V (unless otherwise stated)
PARAMETER
TEST CONDITIONS MIN TYP MAX UNIT
INPUT CURRENTS
I
VIN
V
IN
supply current
REG5V_IN = OPEN, TRIPx = VIN,
OSC = OFF
1.4 2.2 mA
I
VIN(STBY)
V
IN
standby current
ENBLx = 0 V, DDR = VIN,
REG5V_IN = OPEN, OSC = OFF
350 550
I
VIN(SHDN)
V
IN
shutdown current
ENBLx = DDR = 0 V,
REG5V_IN = OPEN
0.05 1.00
µA
I
VIN(REG5)
V
IN
supply current, REG5_IN as 5-V input
current
REG5V_IN = 5 V, OSC = OFF 200 500
I
REG5
REG5_IN input supply current REG5V_IN = 5 V, OSC = OFF 1.0 1.7 mA
I
VBSTx
VBST supply current ENBLx = DDR = VIN 0.05 1.00
A
I
VBSTx
VBST shutdown current ENBLx = DDR = 0 V 0.05 1.00
µA
VREG5 INTERNAL REGULATOR
V
VREG5
VREG5 voltage I
OUT
= 0 A 4.8 5.0 5.2 V
V
LD5
Load regulation 0 mA ≤ I
OUT
≤ 50 mA, V
IN
= 12 V 0.6% 2.5%
V
LN5
Line regulation I
OUT
= 20 mA, 7 V≤V
IN
≤ 28 V 0.4% 2.0%
V
THL
UVLO threshold voltage High to low 3.45 3.65 3.85 V
V
HYS(UV)
UVLO hysteresis 100 200 300 mV
V
TH(SW)
Switchover voltage REG_IN voltage 4.2 4.5 4.8 V
V
HYS(SW)
Switchover hysteresis 50 250 mV