Datasheet

TPS43330-Q1
TPS43332-Q1
SLVSA82E –MARCH 2011–REVISED APRIL 2013 www.ti.com
PIN FUNCTIONS (continued)
NAME NO. I/O DESCRIPTION
Enable input for BuckB (active-high with an internal pullup current source). An input voltage higher than 1.7 V
enables the controller, whereas an input voltage lower than 0.7 V disables the controller. When both ENA and
ENB 17 I
ENB are low, the device shuts down and consumes less than 4 µA of current. NOTE: DIV = high and ENC = high
inhibits low-power mode on the bucks.
This input enables and disables the boost regulator. An input voltage higher than 1.7 V enables the controller.
Voltages lower than 0.7 V disable the controller. Because this pin provides an internal pulldown resistor (500 kΩ),
ENC 19 I
enabling the boost function requires pulling it high. When enabled, the controller starts switching as soon as V
BAT
falls below the boost threshold, depending upon the programmed output voltage.
One can use EXTSUP to supply the VREG regulator from one of the TPS43330-Q1 or TPS43330-Q2 buck
EXTSUP 37 I regulator rails to reduce power dissipation in cases where there is an expectation of high VIN. If EXTSUP is
unused, leave the pin open without a capacitor installed.
Feedback voltage pin for BuckA. The buck controller regulates the feedback voltage to the internal reference of
FBA 12 I 0.8 V. A suitable resistor divider network between the buck output and the feedback pin sets the desired output
voltage.
Feedback voltage pin for BuckB. The buck controller regulates the feedback voltage to the internal reference of
FBB 27 I 0.8 V. A suitable resistor-divider network between the buck output and the feedback pin sets the desired output
voltage.
This output can drive the external high-side N-channel MOSFET for buck regulator BuckA. The output provides
GA1 6 O high peak currents to drive capacitive loads. The gate-drive reference is to a floating ground provided by PHA that
has a voltage swing provided by CBA.
This output can drive the external low-side N-channel MOSFET for buck regulator BuckA. The output provides
GA2 8 O
high peak currents to drive capacitive loads. VREG provides the voltage swing on this pin.
This output can drive the external high-side N-channel MOSFET for buck regulator BuckB. The output provides
GB1 33 O high peak currents to drive capacitive loads. The gate-drive reference is to a floating ground provided by PHB that
has a voltage swing provided by CBB.
This output can drive the external low-side N-channel MOSFET for buck regulator BuckB. The output provides
GB2 31 O
high peak currents to drive capacitive loads. VREG provides the voltage swing on this pin.
This output can drive an external low-side N-channel MOSFET for the boost regulator. This output provides high
GC1 3 O
peak currents to drive capacitive loads. VREG provides the voltage swing on this pin.
This pin makes a floating output drive available to control the external P-channel MOSFET. This MOSFET can
GC2 4 O bypass the boost rectifier diode or a reverse-protection diode when the boost status is non-switching or disabled,
and thus reduce power losses.
Open-drain power-good indicator pin for BuckA. An internal power-good comparator monitors the voltage at the
PGA 15 O feedback pin and pulls this output low when the output voltage falls below 93% of the set value, or if either V
IN
or
V
BAT
drops below its respective undervoltage threshold.
Open-drain power-good indicator pin for BuckB. An internal power-good comparator monitors the voltage at the
PGB 24 O feedback pin and pulls this output low when the output voltage falls below 93% of the set value, or if either V
IN
or
V
BAT
drops below its respective undervoltage threshold.
PGNDA 9 O Power ground connection to the source of the low-side N-channel MOSFETs of BuckA
PGNDB 30 O Power ground connection to the source of the low-side N-channel MOSFETs of BuckB
Switching terminal of buck regulator BuckA, providing a floating ground reference for the high-side MOSFET gate-
PHA 7 O
driver circuitry and used to sense current reversal in the inductor when discontinuous-mode operation is desired.
Switching terminal of buck regulator BuckB, providing a floating ground reference for the high-side MOSFET gate-
PHB 32 O
driver circuitry and used to sense current reversal in the inductor when discontinuous-mode operation is desired.
Connecting a resistor to ground on this pin sets the operational switching frequency of the buck and boost
RT 22 O controllers. A short circuit to ground on this pin defaults operation to 400 kHz for the buck controllers and 200 kHz
for the boost controller.
SA1 10 I High-impedance differential-voltage inputs from the current-sense element (sense resistor or inductor DCR) for
each buck controller. Choose the current-sense element to set the maximum current through the inductor based
on the current-limit threshold (subject to tolerances) and considering the typical characteristics across duty cycle
SA2 11 I
and V
IN
. (SA1 positive node, SA2 negative node).
SB1 29 I High-impedance differential voltage inputs from the current-sense element (sense resistor or inductor DCR) for
each buck controller. Choose the current-sense element to set the maximum current through the inductor based
on the current-limit threshold (subject to tolerances) and considering the typical characteristics across duty cycle
SB2 28 I
and V
IN
. (SB1 positive node, SB2 negative node).
Soft-start or tracking input for buck controller BuckA. The buck controller regulates the FBA voltage to the lower of
0.8 V or the SSA pin voltage. An internal pullup current source of 1 µA is present at the pin, and an appropriate
SSA 14 O
capacitor connected here sets the soft-start ramp interval. Alternatively, a resistor divider connected to another
supply can provide a tracking input to this pin.
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