Datasheet

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SLUS489 − OCTOBER 2001
14
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APPLICATION INFORMATION
error amplifier
The TPS43000 uses voltage mode control for each of the topologies. The output voltage is sensed and fed back
to the FB pin (inverting input) and compared to an internal 800 mV reference connected to the non-inverting
input. The difference (i.e. error voltage), is amplified by the internal error amplifier. The output of the error
amplifier (COMP), is then compared to the oscillator sawtooth ramp to control the pulse width used to drive the
power switch (energizing MOSFET). The duty cycle is varied to regulate the output voltage. The higher the error
voltage, the longer the energizing MOSFET switch is on.
The transient response of a converter is a function of both small signal and large signal responses. The small
signal response is determined by the error amplifier’s loop compensation (feedback network), whereas the large
signal response is a function of the error amplifier’s gain bandwidth and slew rate (dv/dt) as well as the slew
rate of the inductor current (di/dt). The TPS43000 internal error amplifier has a 5-MHz unity gain bandwidth. This
almost assures that the loop bandwidth is limited by external circuit characteristics rather than error amplifier
limitations. The internal error amplifier is capable of sourcing and sinking an ensured 500 µA, which assures
that even during large signal transients, external components determine circuit behavior. Using low feedback
capacitance allows the error amplifier to rapidly slew from one level to another, insuring excellent transient
response.
loop compensation
The voltage loop needs to be compensated to provide control loop stability margin, and to minimize the output
voltage overshoot/undershoot response to line and load transients. A Type III error amplifier compensation
network can be used to optimize the loop response for any of the topologies and operating modes implemented
with the TPS43000. The Type III amplifier circuit is shown in Figure 2. This configuration has a pole at the origin
and two zero-pole pairs. It can provide up to 180° of phase boost.
VOUT
C3
R
BIAS
V
REF
R3
R1
C1
R2
+
C2
Figure 2. Type III Error Amplifier Compensation
Network
0 dB
Av1
Av2
fz1 fz2 fp1 fp2
Gain − dB
Figure 3. Type III Error Amplifier Compensation
Gain Response
t − Time − ns