Datasheet

( )
OUT OUT
CHARGE
SS
1.2 680 2 47
V C
I 0.3 A
t 3.1 m
´ m + ´ m
´
= = =
( ) ( )
RIPPLE
CHARGE
L1 peak OUT max
I
4.88
I I I 20 0.3 23.04 A
2 2
æ ö
æ ö
= + + = + + =
ç ÷
ç ÷
è ø
è ø
TPS40400
www.ti.com SLUS930B –APRIL 2011– REVISED OCTOBER 2011
Peak Current Rating of the Inductor
With the output capacitance known, it is possible to calculate the charge current during start-up and determine
the minimum saturation current rating for the inductor. The start-up charging current is shown in Equation 45 and
the resulting peak inductor current is shown in Equation 46 .
(45)
(46)
Input Capacitance, C
IN
The input capacitor is selected to limit the input ripple voltage to 20% or less of V
IN
. The ripple voltage is due to
the current flowing in the input capacitor’s ESR as well as capacitance charging and discharging. To simplify the
calculations, an infinitely large series input inductance is assumed. With an infinite inductor, the input capacitor
current is calculated to be 5.6 Arms.
For reasons of availability, consider the capacitor EEVFC1E331P, which is an electrolytic, 330-µF, 25-V
capacitor with 150-mΩ of ESR and 100-nH ESL. This capacitor has an rms current rating of 670 mA. With the
calculated rms value of the capacitor current of 5.6 Arms, this implies that needs to be additional capacitance
with a much lower ESR across the input bus in order to divert most of the AC current to this low ESR capacitor.
Another readily available capacitor is selected. A 22-µF, ceramic, 25-V, 10-mΩ ESR, 0.9-nH ESL device, two in
parallel. With these capacitors in parallel, the ripple in the electrolytic is well within its rating with a value of
329 mA
rms
.
Switching MOSFETs, Q
HS
and Q
LS
The high-side and low-side FETs, Q
HS
and Q
LS
, are selected based on several factors including:
• Vds, the drain to source voltage rating. This design requires a 25-V device
• Vgs, the gate to source voltage rating. For the TPS40400 this voltage is 6.5 V
• Conduction losses, based on I
2
×R
DS(on)
• Gate charge, must be low enough to be driven by the PWM controller
These devices are selected:
VOLTAGE RATING R
DS(on)
GATE CHARGE
LOCATION PART NUMBER QTY
(V) (mΩ) Q
G
(nC)
High-side CSD16404Q5A 25 4.1 8 1
Low-side CSD16325Q5 25 1.7 25 2
Since the selected FETs are very fast, the controller is programmed to have the shorter dead-time of 25 ns.
General Component Selection
Refer to the schematic in Figure 21 for device reference designators and connections for the TPS40400 Design
Example 1.
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