Datasheet

TPS40400
SLUS930B APRIL 2011 REVISED OCTOBER 2011
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Bit Value ACTION
0 Device powers up any time power is present regardless of state of the CNTL pin.
Device does not power up until commanded by the CNTL pin and OPERATION
1
command as programmed in bits [2:0] of the ON_OFF_CONFIG register.
cmd
The cmd bit controls how the device responds to the OPERATION command.
Bit Value ACTION
0 Device ignores the on bit in the OPERATION command.
1 Device responds to the on bit in the OPERATION command.
cpr
The cpr bit sets the CNTL pin response. This bit is used in conjunction with the 'cmd', 'pu', and 'on' bits to
determine start up.
Bit Value ACTION
0 Device ignores the CNTL pin. On/off is controlled only by the OPERATION command.
1 Device requires the CNTL pin to be asserted to start the unit.
pol
The pol bit controls the polarity of the CONTROL pin. For a change to become effective, the contents of the
ON_OFF_CONFIG register must be stored to non-volatile memory using either the SOR_DEFAULT_ALL or
STORE_DEFAULT_CODE commands and the device power cycled. Simply writing a new value to this bit does
not change the polarity of the CNTL pin.
Bit Value ACTION
0 CNTL pin is active low.
1 CNTL pin is active high.
cpa
The cpa bit sets the CNTL pin action when turning the controller off. This bit is read internally and cannot be
modified by the user.
Bit Value ACTION
1 Turn off the output and stop transferring energy to the output as fast as possible.
CLEAR_FAULTS (03h)
The CLEAR_FAULTS command is used to clear any fault bits that have been set. This command clears all bits
in all status registers simultaneously. At the same time, the device negates (clears, releases) its SMBALERT
signal output if the device is asserting the SMBALERT signal. The CLEAR_FAULTS command does not cause a
unit that has latched off for a fault condition to restart. If the fault is still present when the bit is cleared, the fault
bit is immediately reset and the host notified by the usual means.
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