Datasheet

5
25
6
7
8
9
10
VSNS
VSNS
+
DIFFO
TRACK
SGND
COMP
FB
VREF
UVLO
OC_FAULT
(PowerPAD
)
SS and
Reference
SS
Error
Amp
+
+
+
Oscillator
SS_DONE
PMBus Interface Logic
and Processing
OVER
_TEMP
2
1
24
23
22
21
ADDR0
ADDR1
DATA
CLK
CNTL
SMBALRT
Non
-Voltaile
Memory
Measurement
System
10-Bit ADC and
Prescalers
4
SYNC
+
19
18
17
16
15
HDRV
BOOT
SW
LDRV
GND
Anti
-Cross
Conduction
and
PWM Latch
Logic
BP6
BP6
OVER
_TEMP
VDD
+
R
R
R
R
PGOOD
Control
SS_DONE
UVLO
OC
3
BP6
PGOOD
+
+
Overcurrent Sensing
ISNS
_GAIN
LOAD
_CURRENT
OC_THRESH
14
20
VDD
13
BP3
3-V
Regulator
6-V
Regulator
UVLO
BP3
UVLO
BP6
UDG-09074
OC
FAULT
OVER
_TEMP
11
ISNS
-
12
ISNS
+
TPS40400
SLUS930B APRIL 2011 REVISED OCTOBER 2011
www.ti.com
FUNCTIONAL BLOCK DIAGRAM
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