Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - voltage regulators - DC DC switch controllers VQFN 24

ADDR1

ADDR0

VDD

CNTL

PGOOD

SYNC

TRACK

TPS40400

COMP

DIFFO

VSNS+

VSNS–

ISNS–

HDRV

BOOT

LDRV

GND

BP6

SMBALRT

12 13

ISNS+ SGND

BP3

1 24CLK DATA

PGOOD

SYNC

TRACK

SMBALRT

CLK

DATA

SNS+

SNS–

OUT

–

UDG-09073

CNTL

TPS40400

www.ti.com

SLUS930B –APRIL 2011– REVISED OCTOBER 2011

3.0-V TO 20-V PMBus SYNCHRONOUS BUCK CONTROLLER

Check for Samples: TPS40400

FEATURES

APPLICATIONS

• Input Operating Voltage Range: 3 V to 20 V

• Smart Power Systems

• PMBus Enabled Analog Controller • Power Supply Modules

• Reference 600 mV ± 1% • Communications Equipment

• Remote Voltage Sense Amplifier • Computing Equipment

• Internal 6-V Regulator and 6-V Gate Drive

DESCRIPTION

• Programmable Overcurrent Protection

The TPS40400 is a cost-optimized flexible

• Inductor Resistance or Series Resistance

synchronous buck controller that operates from a

Used for Current Sensing

nominal 3 V to 20 V supply. This controller is an

• Programmable Switching Frequency: 200 kHz

analog PWM controller that allows programming and

monitoring via the PMBus interface. Flexible features

to 2 MHz

found on this device include programmable soft-start

• Powergood Indicator

time, programmable short circuit limit and

• Thermal Shutdown

programmable undervoltage lockout (UVLO).

• Programmable Soft-Start

XXspacerXX

• Internal Bootstrap Diode

XXXX

• Pre-bias Output Safe

XXXX

• 24-Pin QFN Package

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2SwitcherPro is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (72 pages)

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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com 3.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com DESCRIPTION (CONTINUED) An adaptive anti-cross conduction scheme is used to prevent shoot through current in the power FETs. Gate drive voltage is 6 V to better enhance the power FETs for reduced losses. Short circuit detection is done by sensing the voltage drop across the inductor or across a resistor placed in series with the inductor. A PMBus programmable threshold is compared to this voltage and is used to detect overcurrent.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Unless otherwise stated, these specifications apply for –40°C ≤ TJ ≤ 125°C, VDD= 12 Vdc, FREQUENCY_SWITCH = 600 kHz PARAMETER TEST CONDITIONS MIN TYP 2.7 3.1 MAX UNIT SOFT-START Soft-start time tSS (3) Factory default setting 600 μs ≤ tSS ≤ 9 ms Accuracy –15% 3.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Unless otherwise stated, these specifications apply for –40°C ≤ TJ ≤ 125°C, VDD= 12 Vdc, FREQUENCY_SWITCH = 600 kHz PARAMETER TEST CONDITIONS MIN TYP MAX 1.25 2.5 1.3 2.6 2.5 UNIT OUTPUT DRIVERS RHDHI High-side driver pull up resistance (VBOOT – VSW) = 6.4 V, IHDRV = –100 , TJ = 25°C RHDLO High-side driver pull down resistance (VBOOT – VSW) = 6.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com DEVICE INFORMATION RHL PACKAGE BOTTOM VIEW DATA CLK 24 1 2 CNTL 22 3 PGOOD ADDR0 21 4 SYNC VDD 20 5 TRACK HDRV 19 6 COMP BOOT 18 7 FB 8 DIFFO SMBALRT 23 ADDR1 TPS40400 TM PowerPAD SGND SW 17 LDRV 16 9 VSNS+ GND 15 10 VSNS– BP6 14 11 ISNS– 13 BP3 12 ISNS+ PIN FUNCTIONS PIN NAME NO. I/O DESCRIPTION ADDR0 21 I Low-order address pin for PMBus address configuration.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com PIN FUNCTIONS (continued) PIN NAME NO. I/O DESCRIPTION PAD - Signal ground for the controller. Connect the ground of signal level circuits to this pin. Connections should be arranged so that power level currents do not flow in the pad attached to the thermal plane or in the SGND portion of the circuit. SMBALRT 23 O Output used to signal that PMBus host that the controller needs attention.
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Submit Documentation Feedback Product Folder Link(s) :TPS40400 7 6 8 TRACK FB COMP DIFFO 9 SGND 25 (PowerPAD ) VSNS + VSNS– 10 5 SS VREF R R + – + + Error Amp + R R OVER_TEMP SS_DONE UVLO VDD Oscillator + 2 SYNC 4 PGOOD Control DATA 24 23 3 13 BP3 3-V Regulator UVLO OVER_TEMP ADDR1 22 ADDR0 VDD 20 Non-Voltaile Memory 21 OC 6-V Regulator BP6 14 UVLO BP6 OC FAULT OC_THRESH BP6 Overcurrent Sensing + ISNS_GAIN LOAD _CURRENT OVER_TEMP UVLO Anti-Cross
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS 0.35 0.33 −0.05 CNTL Pin Hysteresis (V) FB Pin Voltage Reference Variation (%) 0.00 −0.10 −0.15 −0.20 −0.25 VVDD = 3 V VVDD = 12 V VVDD = 20 V −0.30 −40 −25 −10 5 20 35 50 65 80 Junction Temperature (°C) 0.31 0.29 0.27 0.25 0.23 0.21 0.19 Active Low Active High 0.17 95 0.15 −40 −25 −10 110 125 Figure 1. FB Pin Voltage Reference Variation vs. Junction Temperature 110 125 0.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) 60 VFB = 450 mV VFB = 600 mV VFB = 750 mV 160 140 120 100 80 60 −40 −25 −10 5 20 35 50 65 80 Junction Temperature (°C) 95 Input Bias Current, FB Pin (nA) Input Bias Current, TRACK Pin (nA) 180 50 40 30 20 10 0 −40 −25 −10 110 125 5.0 4.0 4.5 3.5 3.5 3.0 2.5 2.0 1.5 1.0 Sourcing Sinking 0.5 0.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) 6 12 VVDD = 12 V Frequency Change (%) Frequency Change (%) 4 2 0 −2 FREQUENCY_SWITCH = 200 kHz FREQUENCY_SWITCH = 600 kHz FREQUENCY_SWITCH = 2 MHz −4 −6 −40 −25 −10 5 20 35 50 65 80 Junction Temperature (°C) 95 8 6 4 2 0 −2 VVDD = 3 V −4 −40 −25 −10 110 125 Figure 13. Switching Frequency Change vs. Junction Temperature 5 20 35 50 65 80 Junction Temperature (°C) 95 110 125 Figure 14.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com APPLICATION INFORMATION PMBus General Description Timing and electrical characteristics of the PMBus can be found in the PMB Power Management Protocol Specification, Part 1, revision 1.1 available at http://pmbus.org. The TPS40400 supports both the 100 kHz and 400 kHz bus timing requirements. The TPS40400 does not stretch pulses on the PMBus when communicating with the master device.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com VSNS+ 9 DIFFO + 8 To load supply connections X1 C1 10 R1 VSNS– C3 R3 R4 C2 6 COMP 7 FB R2 UDG-09075 Figure 17. Setting the Output Voltage The components in Figure 17 that determine the nominal output voltage are R1 and R2. R1 is normally chosen to make the feedback compensation values (R3, R4, C1, C2 andC3) come close to readily available standard values. R2 is then calculated in Equation 1.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com æ L ö R5 ´ C4 ³ ç ÷ è RESR ø where (from Figure 18) • • • R5 and RESR are in Ω C4 is in F (suggest 100 nF, 10-7F) L is in H (2) The maximum voltage that the TPS40400 is designed to accept across the ISNS pins is 110 mV.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Current limits must also be observed. Shorting the BP3 pin to GND damages the BP3 regulator. The BP3 regulator input comes from the BP6 regulator output. The current limit circuit on the BP6 regulator is 100 mA so the total current drawn from both regulators must be less than that. This total current includes the TPS40400 operating current IVDD plus the gate drive current required to drive the power FETs.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Output voltage adjustment. The nominal output voltage of the converter can be adjusted using the VOUT_TRIM command. See the VOUT_TRIM command description for the format of this command as used in the TPS40400. The adjustment range is ±25% from the nominal output voltage. The VOUT_TRIM command is typically used to trim the final output voltage of the converter without relying on high precision resistors being used in Figure 17.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Margin low state: VFB = ((VOUT _ MARGIN _ LOW + VOUT _ TRIM)´ VOUT _ SCALE _ LOOP ) where • • • • • VFB is the FB pin voltage VOUT_TRIM is the offset voltage in volts to be applied to the output voltage VOUT_SCALE_LOOP is the output voltage divider scale parameter VOUT_MARGIN_HIGH is the requested margin high voltage VOUT_MARGIN_LOW is the requested margin low voltage (9) For these conditions, the output voltage is shown in Equation 10.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 • www.ti.com RISNS is the resistance of the current sensing element, either the inductor DC resistance or the resistance of the current sense resistor used (11) Combining these two resolution limits shows that for current sense elements with a resistance below 3.75 mΩ, the overcurrent resolution is given by Equation 11. For current sense element resistances above 3.75 mΩ, the overcurrent warning and fault resolution is 500 mA.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Internal Overcurrent Threshold (mV) 120 110 100 90 80 70 60 25 45 65 105 85 Junction Temperature (°C) 125 145 Figure 20. Internal Overcurrent Threshold Variation Reading the output current. The average output current for the converter is readable using the READ_IOUT command. The results of this command support only positive or current sourced from the converter.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com The FB pin is used to sense the output voltage for the purposes of power good detection. Because of this there is the inherent filtering action provided by the compensation network connected from COMP to FB. As the output voltage rises or falls below the nominal value, the error amplifier attempts to force FB to match its reference voltage.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com SUPPORTED COMMANDS The TPS40400 supports the following commands from the PMBus 1.1 specification. OPERATION (01h) The OPERATION command is used to turn the device output on or off in conjunction with the input from the CONTROL pin. It is also used to set the output voltage to the upper or lower MARGIN voltages.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Bit Value ACTION 0 Device powers up any time power is present regardless of state of the CNTL pin. 1 Device does not power up until commanded by the CNTL pin and OPERATION command as programmed in bits [2:0] of the ON_OFF_CONFIG register. cmd The cmd bit controls how the device responds to the OPERATION command. Bit Value ACTION 0 Device ignores the “on” bit in the OPERATION command.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com WRITE_PROTECT (10h) The WRITE_PROTECT command is used to control writing to the PMBus device. The intent of this command is to provide protection against accidental changes. This command is not intended to provide protection against deliberate or malicious changes to the device configuration or operation. All supported command parameters may have their parameters read, regardless of the WRITE_PROTECT settings.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com STORE_DEFAULT_CODE (13h) The STORE_DEFAULT_CODE command instructs the PMBus core to store the contents of the programming register whose Command Code matches the value in the data byte into memory as the new default value.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Mode: Value fixed at 000, linear mode. Exponent Value fixed at 11011, Exponent for Linear mode values is –10. VOUT_TRIM (22h) The VOUT_TRIM command is used to apply a fixed offset voltage to the output voltage command value. It is most typically use by the end user to trim the output voltage at the time the PMBus device is assembled into the end user system.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Command VOUT_MARGIN_HIGH Format Linear, two's complement binary Bit Position 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Access r r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w 0 0 0 0 1 0 1 0 1 0 0 1 1 1 Function Default Value High Byte Low Byte 0 0 The default value of VOUT_MARGIN_HIGH is 0x547 or 1351. This corresponds to a default margin high voltage of 1.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Command VOUT_SCALE_LOOP Format Linear, two's complement binary Bit Position 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Access r r r r r r r/w r/w r/w r/w r/w r/w r/w r/w r/w r/w 1 0 1 0 0 1 0 0 0 0 0 0 Function Exponent Default Value 1 Mantissa 1 0 0 Exponent Value fixed at –9 (dec). Mantissa Default value is 256 (dec). When combined with the exponent, the overall value of VOUT_SCALE_LOOP is 0.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com VIN_ON (35h) The VIN_ON command sets the value of the input voltage at which the unit should start operation assuming all other required startup conditions are met. Values are mapped to the nearest supported increment. Values outside the supported range are treated as invalid data and cause the device set the CML bit in the STATUS_BYTE and the invalid data (ivd) bit in the STATUS_CML registers.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com VIN_OFF (36h) The VIN_OFF command sets the value of the input voltage at which the unit should stop operation. Values are mapped to the nearest supported increment. Values outside the supported range is treated as invalid data and causes the device to set the CML bit in the STATUS_BYTE and the invalid data (ivd) bit in the STATUS_CML registers. The value of VIN_ON remains unchanged during an out-of-range write attempt.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Exponent –15 (dec), fixed. Mantissa The upper four bits are fixed at 0. The lower seven bits are programmable with a default value of 98 (dec) IOUT_CAL_OFFSET (39h) The IOUT_CAL_OFFSET is used to compensate for offset errors in the READ_IOUT results and the IOUT_OC_FAULT_LIMIT and IOUT_OC_WARN_LIMIT thresholds. The units are amps. The default setting is 0 amps. The resolution of the argument for this command is 62.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com VOUT_UV_FAULT_LIMIT (44h) The VOUT_UV_FAULT_LIMIT command sets the value of the output voltage that causes an output undervoltage fault. The contents of this register can be stored to non-volatile memory using the STORE_DEFAULT_ALL or STORE_DEFAULT_CODE commands. The effective value of this command is determined by the settings of the VOUT_MODE command.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com 01: The device continues operation for four switching cycles. If the fault is still present, the device shuts down and responds according to RS[2:0]. 10: The device shuts down and responds according to RS[2:0]. 11: The device shuts down and attempts to restart. RS[2:0] Output voltage undervoltage retry setting 000: A zero value for the Retry Setting means that the unit does not attempt to restart.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com The contents of this register can be stored to non-volatile memory using the STORE_DEFAULT_ALL or STORE_DEFAULT_CODE commands.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Exponent –1 (dec), fixed Mantissa The upper five bits are fixed at 0. Lower six bits are programmable with a default value of 15 (dec) The actual output warning current level for a give mantissa and exponent is: Mantissa IOUT(oc) = Mantissa ´ 2Exponent = 2 (22) The default output fault current setting is 10A. Values of IOUT(oc) can range from 0A to 35A in 500mA increments. The default output warning current setting is 7.5A.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Table 2. Supported POWER_GOOD_ON Levels THRESHOLD Low High 95% 105% 92% 108% 90% 110% For example, with a 1.2 V nominal output voltage, the POWER_GOOD_ON command can set the lower threshold to 1.14 V, 1.104 V or 1.08 V. Doing this automatically sets the upper thresholds to 1.26 V, 1.296 V and 1.32 V respectively. The effective value of this command is determined by the settings of the VOUT_MODE command.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Supported POWER_GOOD_OFF Levels (1) Low Threshold High Threshold 92% 108% 90% (1) 110% 88% 112% Default value For example, with a 1.2 V nominal output voltage, the POWER_GOOD_OFF command can set the lower threshold to 1.104 V, 1.0 8V or 1.056 V. Doing this automatically sets the upper thresholds to 1.296 V, 1.32 V and 1.344 V respectively. The effective value of this command is determined by the settings of the VOUT_MODE command.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 • • • • 2.7 4.2 6.0 9.0 www.ti.com ms (default value) ms ms ms A value of 0 ms instructs the unit to bring its output voltage to the programmed regulation value as quickly as possible. The contents of this register can be stored to non-volatile memory using the STORE_DEFAULT_ALL or STORE_DEFAULT_CODE commands. The TON_RISE command is formatted as a linear mode two’s complement binary integer.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com CML: A Communications, Memory or Logic fault has occurred. NONE OF THE ABOVE: A fault or warning not listed in bit1 through bits 1-7 has occurred, for example an undervoltage condition or an over current warning condition STATUS_WORD (78h) The STATUS_WORD command returns two bytes of information with a summary of the device's fault/warning conditions. The low byte is identical to the STATUS_BYTE above.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com IOUT/POUT: An output current warning or fault has occurred. The PMBus specification states that this also applies to output power. TPS40400 does not support output power warnings or faults. POWER_GOOD: The power good signal is negated. STATUS_VOUT (7Ah) The STATUS_VOUT command returns one byte of information relating to the status of the converter's output voltage related faults.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com STATUS_TEMPERATURE (7Dh) The STATUS_TEMPERATURE command returns one byte of information relating to the status of the converter temperature related faults. The only bits of this register supported by TPS40400 are OT Fault and OT Warning.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com READ_VIN (88h) The READ_VIN commands returns two bytes of data in the linear data format that represent the input voltage applied to the VDD pin of the controller.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com READ_IOUT (8Ch) The READ_IOUT commands returns two bytes of data in the linear data format that represent the output current of the controller. The output current is sensed at the ISNS+ and ISNS– pins.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Exponent Fixed at –2. Mantissa Fixed at 12. MFR_VIN_MAX (A1h) The MFR_VIN_MAX returns a two-byte linear formatted result that represents the maximum voltage that the TPS40400 is specified to operate at.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com MFR_VOUT_MAX (A5h) The command returns a two-byte result that represents the maximum output voltage that the TPS40400 supports.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com NOTE Subsequent to setting the WPE bit, either a STORE_DEFAULT_ALL or STORE_DEFAULT_CODE (for MFR_SPECIFIC_00) PMBus command must be issued in order to prevent the WPE bit from being cleared when the device is subjected to a reset-restart operation. MFR_SPECIFIC_01 (D1h) This command is used for trimming internal components of the TPS40400 and is not recommended for general use.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Default value: 0 READ _ VOUT _ CAL _ GAIN = Mantissa ´ 2Exponent • • • Exponent is fixed at -8 LSB value is 0.4% Range -0.125 to 0.121 (33) MFR_SPECIFIC_06 (D6h) This command applies an offset to the READ_VIN command results to calibrate out offset errors in the on board measurement system. The contents of this register can be stored to non-volatile memory using the STORE_DEFAULT_ALL or STORE_DEFAULT_CODE commands.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com MFR_SPECIFIC_44 (FCh) This command returns a two byte unsigned binary 12-bit device identifier code and 4-bit revision code in the following format.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com DESIGN EXAMPLES Design Example 1: 12-V Input, 1.2-V Output, 20-A (max) Output Current Design Parameters The following example illustrates the design process and component selection for a synchronous buck converter using the TPS40400 controller. The design goal parameters are listed in Table 3. Table 3.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com For this design a 750-nH inductor from Pulse (PG0077.801) was selected. The actual ripple current should now be recalculated using the actual inductance value. V 1.2 IRIPPLE = di = dt ´ L = 3.05 m ´ = 4.88 AP-P L 0.75 m (37) With this ripple current, the inductor RMS and peak current values can be calculated. The RMS value of a zero-average triangular wave is given by Equation 38. 2 IRMS = (IDC )2 + (IAC )2 = æ 4.88 ö ÷ = 20.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Peak Current Rating of the Inductor With the output capacitance known, it is possible to calculate the charge current during start-up and determine the minimum saturation current rating for the inductor. The start-up charging current is shown in Equation 45 and the resulting peak inductor current is shown in Equation 46 . ´ COUT 1.2 ´ (680 m + 2 ´ 47m ) V = = 0.3 A ICHARGE = OUT tSS 3.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Figure 21.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Device Addressing, RADDR0 and RADDR1 The PMBus address for the device must be read from the ADDR0 and ADDR1 pins. Each pin has an internal fixed current source and the resulting developed voltage is read and converted to the desired device address. The external resistors RADDR0 and RADDR1 from the address pins to ground set eight possible states for a total of 64 possible addresses.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Bootstrap Capacitor, C9 Selection of the bootstrap capacitor is based on the total gate charge of the high-side FET and the allowable ripple on the BOOT pin. A ripple of 0.2 V is chosen as maximum for this design. This yields a value described in Equation 49. QGHS 8nC CBOOT = C9 ³ ´ = 40nF VBOOT(ripple ) 0.2 V (49) Choose a standard value of 100 nF.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Remote Sensing Remote sensing can be accomplished with the differential amplifier as shown in Figure 22. Resistors RS1 and RS2 (R7 and R18 in the schematic above) are used if the sense connections fail or get damaged.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Typical Performance Characteristics 140 fSW = 300 kΩ Gain Phase Reference 60 94 100 40 80 90 30 60 20 40 10 20 86 0 0 84 −10 88 VIN = 8 V VIN = 12 V VIN = 14 V 82 80 58 120 92 Gain (dB) Efficiency (%) 50 0 2 4 6 8 10 12 14 Output Current (A) 16 18 −20 Phase (°) 70 96 −20 IOUT = 20 A VIN = 14 V −30 100 −40 1000 10000 Frequency (Hz) 20 −60 100000 G000 G000 Figure 23. Efficiency Figure 24.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Design Example 1 List of Materials Table 7 lists of materials for Design Example 1. Table 7. List of Materials REFERENCE DESIGNATOR C1, C2, C9, C17 QTY 4 VALUE 100 nF DESCRIPTION SIZE Ceramic, 25 V, X7R, 10% PART NUMBER 0603 MFR Std Std TPSE687K006R004 5 AVX C11 1 680 µF Tantalum, 6.3 V, 10% C13, C14 2 47 µF Ceramic, 6.3 V, X7R, 10% 1210 Std Std C15, C18 2 1 µF Ceramic, 16 V, X7R, 10% 0805 Std Std C16 1 1.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Internal Configuration Internal configuration of the TPS40400 is handled via the PMBus (pins CLK and DATA) and the Fusion Digital Power Designer (GUI interface). An example of the configuration window that is used to make internal configuration changes to the TSP40400 is shown below in Figure 27. Figure 27.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Configuration changes can be implemented by changing the value in the Value/Edit box of each parameter. Most boxes allow direct parameter changes such as voltage or current, but some boxes such as IOUT_OC_FAULT_RESPONSE provide a pop-up configuration window as shown in Figure 28, and others provide a pull-down menu. Select the appropriate radio buttons to make the desired changes.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Design Example 2: 12-V Input, 5-V Output, 5-A (max) Output Current Design Example 2 Parameters The following example illustrates the design process and component selection for a synchronous buck converter using the TPS40400 controller. The design goal parameters are listed in Table 8. Table 8.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com General Component Selection Refer to the schematic below for device reference designators and connections. Figure 29.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Design Example 2 List of Materials Table 9 lists of materials for Design Example 2. Table 9. Design Example 2 List of Materials REFERENCE DESIGNATOR QTY VALUE DESCRIPTION SIZE PART NUMBER MFR C1, C2, C9, C17 4 0.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com Design Characterization Figure 31. Switching Voltage and Inductor Current Waveform 5.140 5.140 5.139 5.139 5.138 5.138 Ouptut Voltage (V) Ouptut Voltage (V) Figure 30. Switching Voltage and Inductor Current Waveform 5.137 5.136 5.135 5.134 IOUT = 5 A IOUT = 2 A IOUT = 0 A 5.133 5.132 8 9 10 11 12 Input Voltage (V) 13 5.137 5.136 5.135 5.134 14 5.132 0.0 G000 Figure 32.
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TPS40400 SLUS930B – APRIL 2011 – REVISED OCTOBER 2011 www.ti.com REVISION HISTORY Changes from Revision A (JULY 2011) to Revision B Page • Changed corrected default values in ON_OFF_CONFIG table. ......................................................................................... 23 • Added Design Example 1 ................................................................................................................................................... 51 • Added Design Example 2 .............
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PACKAGE MATERIALS INFORMATION www.ti.com 27-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS40400RHLR VQFN RHL 24 3000 330.0 12.4 3.8 5.8 1.2 8.0 12.0 Q1 TPS40400RHLT VQFN RHL 24 250 180.0 12.4 3.8 5.8 1.2 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 27-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS40400RHLR VQFN RHL 24 3000 367.0 367.0 35.0 TPS40400RHLT VQFN RHL 24 250 210.0 185.0 35.
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