Using the TPS40322EVM-074 User's Guide Literature Number: SLUU926 May 2012
User's Guide SLUU926 – May 2012 Dual-Phase, Single-Output, Synchronous Buck Converter 1 Introduction The TPS40322EVM-074 evaluation module (EVM) is a dual-phase single output synchronous buck converter. The EVM delivers 1.2 V at 30 A from a DC input voltage that ranges from 4.5 V up to 15 V. The module uses the TPS40322 Dual Output or Two-Phase Synchronous Buck Controller and the CSD87330Q3D Synchronous Buck NexFET™ Power Block in a 500-kHz application.
Electrical Performance Specifications www.ti.com 3 Electrical Performance Specifications Table 1. TPS40322EVM-074 Electrical Performance Specifications PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Input Characteristics VIN, Voltage range 4.5 15.0 V Maximum input current VIN = VIN(min), IOUT = IOUT(max) 9.
R15 10.0k C30 R19 511 2200pF R16 10.0k Dual-Phase, Single-Output, Synchronous Buck Converter Copyright © 2012, Texas Instruments Incorporated CHA R21 51.1 TP17 R17 3.32k C29 8200pF TP14 GND CHB C31 330pF 3 2 1 TP12 C22 22nF TP13 R14 40.2k BP6 TP15 BP6 1 SYNC PWPD 33 VSNS GSNS 8 FB2 7 COMP2 6 AGND 5 COMP1 4 FB1 3 EN1/SS1 2 RT PHSET 32 9 DIFFO BP6 PHSET J4 U1 TPS40322RHB ILIM1 30 11 ILIM2 R10 42.2k CS1- 29 C43 0.1uF 12 CS2- R6 38.
Test Setup www.ti.com 5 Test Setup 5.1 Test Equipment Voltage Source: The input DC voltage source (VSOURCE) shall be a 0-V to 15-V variable DC source capable of 10 ADC at 4.5 VDC. Connect VSOURCE to J1 as shown in Figure 2. Multimeters: • Volt meter, V1: 0 VDC to 15 VDC for input voltage measurement. • Volt meter, V2: 0 VDC to 5 VDC for output voltage measurement. • Current meter, A1: 0 VDC to 10 ADC for input current measurement. • Current meter, A2: 0 ADC to 30 ADC for output current measurement.
Test Setup www.ti.com LOAD V1 VSOURCE 4.5 to 15Vdc V3 A1 V2 SHUNT FAN Figure 2. TPS40322EVM-074 Recommended Test Setup Figure 3.
Test Setup www.ti.com 5.3 List of Test Points Table 2.
Test Procedure www.ti.com 6 Test Procedure 6.1 Load Regulation Measurement Procedure 1. Ensure the LOAD is set to constant-current mode and to set to sink 0 A. 2. Increase VSOURCE from 0 V to 4.5 VDC. VOUT should be in regulation once V1 shows VIN is 4.5 V or greater. 3. Vary LOAD from 0 A to 30 A. VOUT should remain within regulation per Table 1. 6.2 Line Regulation Measurement Procedure 1. Set LOAD to constant-current mode and to set to sink 30 A. 2. Vary VSOURCE so that V1 measures 4.5 VDC to 15.
Performance Data and Typical Characteristic Curves www.ti.com 7 Performance Data and Typical Characteristic Curves Figure 4 through Figure 13 present typical performance curves for the TPS40322EVM-074. Since actual performance data can be affected by measurement techniques and environmental variables, these curves are presented for reference and may differ from actual field measurements. 7.1 Efficiency EVM Efficiency 1 0.9 0.8 Efficiency 0.7 0.6 0.5 0.4 0.3 0.2 0.
Performance Data and Typical Characteristic Curves 7.3 www.ti.com Load Regulation Load Regulation OUTPUT VOLTAGE (V) 1.210 1.205 1.200 1.195 1.190 0 5 10 15 20 25 30 35 OUTPUT LOAD (A) Vin = 4.5V Vin = 8V Vin = 12V Vin = 15V Figure 6. TPS40322EVM-074 Load Regulation 7.4 Line Regulation LINE REGULATION 1.210 1.208 OUTPUT VOLTAGE (V) 1.206 1.204 1.202 1.200 1.198 1.196 1.194 1.192 1.190 4 5 6 7 8 9 10 11 12 13 14 15 16 INPUT VOLTAGE (V) Figure 7.
Performance Data and Typical Characteristic Curves www.ti.com 7.5 Bode Plot 180 45 135 30 90 15 45 0 0 -15 -45 -30 -90 -45 -135 -60 100 1000 10000 100000 Phase (°) Gain (dB) Phase/Gain vs Frequency 60 -180 1000000 Frequency (Hz) Gain Phase Figure 8. TPS40322EVM-074 Loop Response Gain and Phase (VIN = 8 V IOUT = 30 A, 76 degrees of phase margin at fCO = 24 kHz) 7.6 Output Ripple Figure 9.
Performance Data and Typical Characteristic Curves 7.7 www.ti.com Switching Waveforms Figure 10. Switching Waveforms, (Ch1 = SW1, Ch2 = HDRV1, Ch3 = LDRV1, Ch4 = BOOT1, VIN = 8 V, IOUT = 30 A) Figure 11.
Performance Data and Typical Characteristic Curves www.ti.com 7.8 Turn-On Waveform Figure 12. Enable turn on waveform, (Ch1 = VOUT, Ch2 = IOUT, VIN = 8 V, IOUT = 30 A (10 A/V scale)) 7.9 Turn-Off Waveform Figure 13.
EVM Assembly Drawings and PCB Layout 8 www.ti.com EVM Assembly Drawings and PCB Layout Figure 14 through Figure 23 show the design of the TPS40322EVM-074 printed circuit board, PWR074. Figure 14. TPS40322EVM-074 Top Layer Assembly Drawing (top view) Figure 15.
EVM Assembly Drawings and PCB Layout www.ti.com Figure 16. TPS40322EVM-074 Top Copper (top view) Figure 17.
EVM Assembly Drawings and PCB Layout www.ti.com Figure 18. TPS40322EVM-074 Internal Layer 1 (top view) Figure 19.
EVM Assembly Drawings and PCB Layout www.ti.com Figure 20. TPS40322EVM-074 Internal Layer 3 (top view) Figure 21.
EVM Assembly Drawings and PCB Layout www.ti.com Figure 22. TPS40322EVM-074 Top Silk (top view) Figure 23.
List of Materials www.ti.com 9 List of Materials The EVM components list according to the schematic shown in Figure 1. Table 3. TPS40322EVM-074 List of Materials COUNT REF DES 2 C1, C2 6 DESCRIPTION PART NUMBER MFR EEE-FPE101XAP Panasonic C13, C14, C15, Capacitor, aluminum, 220 µF, 4 V, 5 mΩ, ±20%, 7343 C34, C35, C36 EEFSE0G221R Panasonic 0 C16, C37 Capacitor, aluminum, Open, 4 V, ±20%, 7343 Std Std 2 C20, C23 Capacitor, ceramic, 4.
Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods.
FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
【Important Notice for Users of this Product in Japan】 】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.
EVALUATION BOARD/KIT/MODULE (EVM) WARNINGS, RESTRICTIONS AND DISCLAIMERS For Feasibility Evaluation Only, in Laboratory/Development Environments. Unless otherwise indicated, this EVM is not a finished electrical equipment and not intended for consumer use.
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
