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Connector and Test Point Descriptions

4 Connector and Test Point Descriptions

4.1 Enable Jumper (JP2)

The TPS40305EVM-488 is designed with a Disable Jumper (JP2) using a 0.1" spacing header and shunt.

Installing a shunt in the JP2 position connects the EN/SS pin to GND, discharges the soft-start capacitor,

and disables the TPS40305 controller. This forces the output into a high-impedance state (approximately

15kΩ to GND).

4.2 Frequency Spread Spectrum – FSS Jumper (JP1)

The TPS40305EVM-488 is designed with a FSS Enable Jumper (JP1) using a 0.1" spacing header and

shunt. Installing a shunt in the JP1 position connects the EN/SS pin to BP via a 267-kΩ resistor (R10) to

enable Frequency Spread Spectrum.

Frequency Spread Spectrum modulates the switching frequency to ±10% of the nominal value at 30kHz to

reduce EMI at the switching frequency and its harmonics, however there may be a 30-kHz component to

the output ripple (see Figure 10).

The TPS40305EVM-488 does not dynamically monitor the JP1 status for programming FSS. The

TPS40305EVM-488 must be disabled via JP2 or powered down by reducing VIN to less than 3.0V to

remove or install JP1.

4.3 Test Point Descriptions

Table 2. Test Point Description

Test Point Label Use Section

TP1 VIN Measurement test point for input voltage 4.3.1

TP2 GND Ground test point for input voltage 4.3.1

TP3 VOUT Measurement test point for output voltage 4.3.1

TP4 GND Ground test point for output voltage 4.3.2

TP5 CHB Measurement test point for channel B of loop response 4.3.3

TP6 SGND Ground test point for channel B of loop response 4.3.3

TP7 CHA Measurement test point for channel A of loop response 4.3.3

TP8 SGND Ground test point for channel A of loop response 4.3.3

TP9 SGND Ground test point for error amplifier measurements 4.3.4

TP10 COMP Measurement test point for error amplifier output voltage 4.3.4

TP11 FB Measurement test point for error amplifier input voltage 4.3.4

TP12 HDRV Measurement test point for high-side gate driver voltage 4.3.5

TP13 LDRV Measurement test point for low-side gate driver voltage 4.3.5

TP14 PGND Ground test point for switch node and gate drive voltages 4.3.5

TP15 SW Measurement test point for switch node voltage 4.3.5

TP16 PGOOD Measurement test point for power good 4.3.6

TP17 EN/SS Measurement test point for enable / soft-start 4.3.7

TP18 SGND Ground test point for power good and enable / soft-start 4.3.6 and 4.3.7

4.3.1 Input Voltage Monitoring (TP1 and TP2)

The TPS40305EVM-488 provides two test points for measuring the input voltage applied to the module.

This allows the user to measure the actual input module voltage without losses from input cables and

connectors. All input voltage measurements should be made between TP1 and TP2. To use TP1 and

TP2, connect a voltmeter positive input to TP1 and input terminal to TP2.

SLUU406–February 2010 TPS40305EVM-488

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