Datasheet

0
0.4
0.7 V
0.8
1.3 V
1.2
1.6
2.0
V
EN/SS
t – Time – ms
Calibration
Time
1.9 ms
V
IN
– Input Voltage – V
V
SS_INT
UDG-09159
TPS40303, TPS40304, TPS40305
SLUS964A –NOVEMBER 2009–REVISED AUGUST 2012 www.ti.com
APPLICATION INFORMATION
Introduction
The TPS4030x is a family of cost-optimized synchronous buck controllers providing high-end features to
construct high-performance DC/DC converters. Pre-bias capability eliminates concerns about damaging sensitive
loads during startup. Programmable over-current protection levels and hiccup over-current fault recovery
maximize design flexibility and minimize power dissipation in the event of a prolonged output short. Frequency
Spread Spectrum (FSS) feature reduces peak EMI noise by spreading the initial energy of each harmonic along
a frequency band, thus giving a wider spectrum with lower amplitudes.
Voltage Reference
The 600 mV band gap cell is internally connected to the non-inverting input of the error amplifier. The reference
voltage is trimmed with the error amplifier in a unity gain configuration to remove amplifier offset from the final
regulation voltage. The 1% tolerance on the reference voltage allows the user to design a very accurate power
supply.
Enable Functionality, Startup Sequence and Timing
After input power is applied, an internal current source of 40 µA starts to charge up the soft-start capacitor
connected from EN/SS to GND. When the voltage across that capacitor increases to 0.7 V, it enables the internal
BP regulator followed by a calibration. The total calibration time is about 1.9 ms. See Figure 13. During the
calibration, the device performs in the following way. It disables the LDRV drive and injects an internal 10 µA
current source to the resistor connected from LDRV to GND. The voltage developed across that resistor is then
sampled and latched internally as the OCP trip level until one cycles the input or toggles the EN/SS.
Figure 13. Startup Sequence and Timing
The voltage at EN/SS is internally clamped to 1.3 V before and/or during calibration to minimize the discharging
time once calibration is complete. The discharging current is from an internal current source of 140 µA and it
pulls the voltage down to 0.4 V. It then initiates the soft-start by charging up the capacitor using an internal
current source of 10 µA. The resulting voltage ramp on this pin is used as a second non-inverting input to the
error amplifier after an 800 mV (typical) downward level-shift; therefore, actual soft-start will not take place until
the voltage at this pin reaches 800 mV.
If EN/SS is left floating, the controller starts automatically. EN/SS must be pulled down to less than 270 mV to
guarantee that the chip is in shutdown mode.
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