Datasheet

+
TPS40303, TPS40304, TPS40305
SLUS964A NOVEMBER 2009REVISED AUGUST 2012
www.ti.com
DESIGN EXAMPLES
Design Example 1: Using the TPS40305 for a 12 V to 1.8 V Point-of-Load Synchronous Buck
Regulator
12 V to 1.8 V Point-of-Load Synchronous Buck Regulator
The following example illustrates the design process and component selection for a 12 V to 1.8 V point-of-load
synchronous buck regulator using the TPS40305.
Table 1. Design Example Electrical Characteristics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
IN
Input voltage 8 14 V
V
IN(ripple)
Input ripple voltage I
OUT
= 10 A 0.6 V
V
OUT
Output voltage 0 A I
OUT
10 A 1.764 1.800 1.836 V
Line regulation 8 V V
IN
14 V 0.5%
Load regulation 0 A I
OUT
10 A 0.5%
V
RIPPLE
Output voltage ripple I
OUT
= 10 A 36 mV
V
OVER
Output overshoot I
OUT
falling from 7 A to 3 A 100 mV
V
UNDER
Output undershoot I
OUT
rising from 3 A to 7 A 100 mV
I
OUT
Output current 4.5 V V
IN
5.5 V 0 10 A
t
SS
Soft start time V
IN
= 12 V 1.5 ms
I
SCP
Short circuit current trip point 13 15 A
f
SW
Switching frequency 1200 kHz
η Efficiency V
IN
= 12 V, I
OUT
= 5 A 90%
η Full load efficiency V
IN
= Nom, I
OUT
= Max 80%
Figure 14. TPS40305 Design Example Schematic
The list of materials for this application is shown in Table 3. The loop response and efficiency from boards built
using this design are shown in Figure 15 and Figure 16. Gerber Files and additional application information are
available from the factory.
Design Procedure
Selecting the Switching Frequency
To achieve the small size for this design the TPS40305, with f
SW
= 1200 kHz, is selected for minimal external
component size.
14 Submit Documentation Feedback Copyright © 2009–2012, Texas Instruments Incorporated
Product Folder Links :TPS40303 TPS40304 TPS40305