Datasheet

( )
f
f
SW ISNS(oc)
ISNS
SW OUT(oc) OUT D IN
L V
R
2 L I V V V
´ ´
=
´ ´ ´ ´ + -
( )
f
ISNS ISNS
ISNS
OUT
RIPPLE
OUT
IN
SW
V V
R
I
I
I
D V
1 D 2
1 D 2 L
= =
æ ö æ ö
æ ö
æ ö
´
+
+
ç ÷ ç ÷
ç ÷
ç ÷
ç ÷
-
è ø
- ´ ´
è ø
è ø
è ø
f
VDD
e SW
V
s
20
æ ö
= ´
ç ÷
è ø
( )
CS ISNS OUT D IN
A R V V V
m2
L
´ ´ + -
=
TPS40210, TPS40211
www.ti.com SLUS772E –MARCH 2008– REVISED OCTOBER 2011
(6)
If the converter is operating in continuous conduction mode R
ISNS
can be found in Equation 7.
(7)
Where:
• R
ISNS
is the value of the current sense resistor in Ω.
• V
ISNS(oc)
is the overcurrent threshold voltage at the ISNS pin (from electrical specifications)
• D is the duty cycle (from Equation 2)
• f
SW
is the switching frequency in Hz
• V
IN
is the input voltage to the power stage in V (see text)
• L is the value of the inductor in H
• I
OUT
(oc) is the desired overcurrent trip point in A
• V
D
is the drop across the diode in Figure 23
The TPS40210/11 has a fixed undervoltage lockout (UVLO) that allows the controller to start at a typical input
voltage of 4.25 V. If the input voltage is slowly rising, the converter might have less than its designed nominal
input voltage available when it has reached regulation. As a result, this may decreases the apparent current limit
load current value and must be taken into consideration when selecting R
ISNS
. The value of V
IN
used to calculate
R
ISNS
must be the value at which the converter finishes startup. The total converter output current at startup is
the sum of the external load current and the current required to charge the output capacitor(s). See the Soft Start
section of this datasheet for information on calculating the required output capacitor charging current.
The topology of the standard boost converter has no method to limit current from the input to the output in the
event of a short circuit fault on the output of the converter. If protection from this type of event is desired, it is
necessary to use some secondary protection scheme, such as a fuse, or rely on the current limit of the upstream
power source.
Current Sense and Sub-Harmonic Instability
A characteristic of peak current mode control results in a condition where the current control loop can exhibit
instability. This results in alternating long and short pulses from the pulse width modulator. The voltage loop
maintains regulation and does not oscillate, but the output ripple voltage increases. The condition occurs only
when the converter is operating in continuous conduction mode and the duty cycle is 50% or greater. The cause
of this condition is described in Texas Instruments literature number SLUA101, available at www.ti.com. The
remedy for this condition is to apply a compensating ramp from the oscillator to the signal going to the pulse
width modulator. In the TPS40210/11 the oscillator ramp is applied in a fixed amount to the pulse width
modulator. The slope of the ramp is given in Equation 8.
(8)
To ensure that the converter does not enter into sub-harmonic instability, the slope of the compensating ramp
signal must be at least half of the down slope of the current ramp signal. Since the compensating ramp is fixed in
the TPS40210/11, this places a constraint on the selection of the current sense resistor.
The down slope of the current sense wave form at the pulse width modulator is described in Equation 9.
(9)
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