Datasheet

f
L
10 10
C2 2837pF
2 R4 2 30kHz 18.7k
= = =
p´ ´ p ´ ´ W
f
L
1 1
C4 56.74pF
10 R4 10 30kHz 18.7k
» = =
p´ ´ p´ ´ W
1 1
C4 11.35pF
GBW R4 1.5MHz 18.7k
> = =
p´ ´ p´ ´ W
6
SS SS
C 20 T 10
-
= ´ ´
Gain – dB
-80
-40
80
20
-20
40
60
-60
100
f
SW
– Frequency – Hz
1000 10 k 100 k 1 M
0
Phase – °
-180
-90
180
45
-45
90
135
-135
0
Phase
Gain
V
IN
= 8 V
V
OUT
= 24 V
I
OUT
= 2 A
GDRV
(5 V/ div)
FET Vds
(20 V/ div)
T – Time – 400 ns
TPS40210, TPS40211
www.ti.com SLUS772E –MARCH 2008– REVISED OCTOBER 2011
(65)
C2 = 2200 pF selected.
Place a high-frequency pole at about 5 times the desired cross-over frequency and less than one-half the unity
gain bandwidth of the error amplifier:
(66)
(67)
C4 = 47 pF selected.
R-C Oscillator
The R-C oscillator calculation is given as shown in Equation 5 in the datasheet, substituting 100 for C
T
and 600
for f
SW
. For a 600-kHz switching frequency, a 100-pF capacitor is selected and a 262-kΩ resistor is calculated
(261-kΩ selected).
Soft-Start Capacitor
Since VDD > 8V, the soft-start capacitor is selected by using Equation 68 to calculate the value.
(68)
For T
SS
= 12 ms, C
SS
= 240 nF. A 220-nF capacitor is selected.
Regulator Bypass
A regulator bypass (BP) capacitor of 1.0-μF is selected per the datasheet recommendation.
TEST DATA
GAIN AND PHASE FET VDS and VGS VOLTAGES
vs vs
FREQUENCY TIME
Figure 31. Figure 32.
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