Datasheet
8
7
VDD
ISNS
R
ILIM
6
GDRV
V
IN
R
F1
R
F2
C
F
TPS40200
ILIM
R
1.0
ILIM =
SW
RCRC
f105.0
1
CR
´
=´
TPS40200-EP
www.ti.com
SGLS371A –JANUARY 2007–REVISED JANUARY 2013
Switching Frequency
The TPS40200 has a built-in, 8-V, 200-mA, P-channel FET driver output that facilitates using P-channel
switching FETs. A clock frequency of 300 kHz was chosen as a switching frequency which represents a
compromise between a high frequency that allows the use of smaller capacitors and inductors, but one that is not
so high as to cause excessive transistor switching losses. As previously discussed, an optimum frequency can
be selected by picking a value where the dc and switching losses are equal.
The frequency is set by using the design formula given in the FET Selection Criteria section.
(17)
Where:
R
RC
= Timing resistor value (in ohms), or R
RC
= 68.1 Ω
C
RC
= Timing capacitor value (in F), or C5 = 470 pF
f
SW
= Desired switching frequency (in Hz) which, in this case, calculates to 297 kHz
At a worst case of 16 V, the timing resistor draws about 250 μA, which is well below the 750 μA maximum that
the circuit can pull down.
Programming the Overcurrent Threshold Level
The current limit in the TSP40200 is triggered by a comparator with a 100-mV offset, whose inputs are
connected across a current-sense resistor between V
CC
and the source of the high-side switching FET. When
current in this resistor develops more than 100 mV, the comparator trips and terminates the output gate drive.
In this application, the current-limit resistor is set by the peak output-stage current, which consists of the
maximum load current plus one-half the ripple current (in this case, 2.5 + 0.125 = 2.625 A). To accommodate
tolerances, a 25% margin is added, giving a 3.25-A peak current. Using the equation below then yields a value
for R
ILIM
of 0.30 Ω.
Current sensing in a switching environment requires attention to both circuit-board traces and noise pickup. In
Figure 35, a small RC filter has been added to the circuit to prevent switching noise from tripping the current-
sense comparator. The requirements of this filter are board dependent, but with the layout used in this
application, no spurious overcurrent was observed.
Figure 35. Overcurrent Trip Circuit for R
F2
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