Datasheet

COMP
FB
SS
ISNS
RC
Soft-Start
and
Overcurrent
E/A and SS
Reference
Enable E/A
700 mV
PWM
Logic
GDRV voltage
swing limited
to (V – 8 V)
IN
VDD
GDRV
GND
+
–
+
Driver
OSC
UVLO
5
3
4
2
7
1
8
6
TPS40200-HT
www.ti.com SGLS400C –OCTOBER 2009–REVISED DECEMBER 2012
DEVICE INFORMATION
Figure 4. Functional Block Diagram
TERMINAL FUNCTIONS
TERMINAL
I/O DESCRIPTION
NAME NO.
Switching frequency-setting RC network. Connect capacitor from RC pin to GND pin and resistor from V
IN
RC 1 I pin to RC pin. The device may be synchronized to an external clock by connecting an open-drain output to
this pin and pulling it to GND. The pulse width for synchronization should not be excessive.
Soft-start programming pin. Connect capacitor from SS to GND to program soft-start time. Pulling this pin
SS 2 I below 150 mV causes the output switching to stop, placing the device in a shutdown state. The pin also
functions as a restart timer for overcurrent events.
COMP 3 O Compensation. Error amplifier output. Connect control-loop compensation network from COMP to FB.
FB 4 I Feedback. Error amplifier inverting input. Connect feedback resistor network center tap to this pin.
GND 5 Device ground
GDRV 6 O Driver output for external P-channel MOSFET
ISNS 7 I Output voltage.
VDD 8 I System input voltage. Connect local bypass capacitor from VDD to GND.
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