Datasheet

( )
( )
)S(XKSKKT
LCPWMEAFBSV
´´´=
C
OUT
L
R
LOAD
V
IN
V
OUT
R
SW
R
SR
D
1-D
V
sw
( )
D1RDR)S(Z)S(Z
)S(Z
)S(X
SRSWLOUT
OUT
LC
-´+´++
=
6
10
fb
R
R
K =
TPS40200
SLUS659F –FEBRUARY 2006–REVISED MARCH 2012 www.ti.com
Step 5
Calculate the gain elements in the system to determine the gain required by the error amplifier to make the over
all gain 0 dB at 35 kHz.
The total gain around the voltage feedback loop is:
where
• K
FB
is the output voltage setting divider
• K
EA
is the error amplifier feedback
• K
PWM
is the modulator gain
• X
LC
is the filter transfer function
With reference to the graphic below, the output filter's transfer characteristic XLC (S) can be estimated by the
following:
Figure 39. Output Filter Analysis
where
• Z
OUT
is the parallel combination of output
capacitor(s) and the load
• R
SW
is the R
DS(on)
of the switching FET plus the
current-sense resistor
• R
SR
is the resistance of the synchronous rectifier
• D is the duty cycle estimated as 3.3 / 12 = 0.27
To evaluate X
LC
(S) at 35 kHz use the following:
• Z
OUT
(s) at 35 kHz, which is dominated by the output capacitor's ESR; estimated to be 400 mΩ
• Z
L
(s) at 35 kHz is 7.25 Ω
• R
SW
= 0.95 mΩ, including the R
LIM
resistance
• R
SR
= 100 mΩ
Using these numbers, X
LC
(S) = 0.04 or –27.9 db.
The feedback network has a gain to the error amplifier given by:
where
• for 3.3 V
OUT
, R6 = 26.7 kΩ
Using the values in this application, K
fb
= 11.4 dB.
The modulator has a gain of 10 that is flat to well beyond 35 kHz, so K
PWM
= 20 dB.
To achieve 0 db overall gain, the amplifier and feedback gain must be set to 7.9 db (20 db – 27.9db)
The amplifier gain, including the feedback gain, K
fb
, can be approximated by this expression:
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