Datasheet

VDD 8
ISNS
7
GDRV
6
TPS40200
C
F
R
F2
UDG-11200
R
ILIM
V
IN
R
F1
I
ILIM
=
0.1
R
ILIM
TPS40200
www.ti.com SLUS659F –FEBRUARY 2006–REVISED MARCH 2012
At a worst case of 16 V, the timing resistor draws about 250 μA which is well below the 750 μA maximum which
the circuit can pull down.
Programming the Overcurrent Threshold Level
The current limit in the TSP40200 is triggered by a comparator with a 100-mV offset whose inputs are connected
across a current-sense resistor between V
CC
and the source of the high-side switching FET. When current in this
resistor develops more than 100 mV, the comparator trips and terminates the output gate drive.
In this application, the current-limit resistor is set by the peak output stage current which consists of the
maximum load current plus ½ the ripple current. In this case, we have 2.5 +0.125 = 2.625 A. To accommodate
tolerances a 25% margin is added giving a 3.25 A peak current. Using the equation below then yields a value for
R
ILIM
of 0.03 Ω.
Current sensing in a switching environment requires attention to both circuit board traces and noise pick up. In
the design shown a small RC filter has been added to the circuit to prevent switching noise from tripping the
current sense comparator. The requirements of this filter are board-dependent, but with the layout used in this
application, no unreasonable overcurrent is observed.
Figure 34. Overcurrent Trip Circuit for R
F2
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