Datasheet

TPS40195
www.ti.com SLUS720E –FEBRUARY 2007–REVISED JULY 2012
DESIGN EXAMPLES
Design Example 1
Table 3. Design Example Electrical Specifications
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
V
IN
Input voltage 10.8 12.0 13.2 V
V
IN
= 12 V, I
OUT
= 10 A 1.7 1.8 A
I
IN
Input current
No load, V
IN
= 12 V, I
OUT
= 0 A 5 mA
VIN_
Undervoltage lockout turn off threshold 0 A ≤ I
OUT
≤ 10 A 5.4 6.0 6.6
UVLO_OFF
V
VIN_UVLO
Undervoltage lockout turn on threshold 0 A ≤ I
OUT
≤ 10 A 6.6 7.0 7.6
_ON
OUTPUT
V
OUT
Input voltage range V
IN
= 12 V, I
OUT
= 5 1.75 1.80 1.85 V
Line regulation 10.8 ≤ V
IN
≤ 13.2 V 0.5%
Load regulation 0 A ≤ I
OUT
≤ 10 A 0.5%
V
OUT(ripple)
Output voltage ripple V
IN
= 12 V, I
OUT
= 10 A 100 mV
P-P
I
OUT
Output current 10.8 ≤ V
IN
≤ 13.2 V 0 5 10
A
I
OCP
Output overcurrent inception point V
IN
= 12 V, V
OUT
= (V
OUT
- 5) 14 20 43
ΔI Transient response load step 10 A ≤ I
OUT(max)
≤ 0.2 × ( I
OUT(max)
) 8 A
Transient response load slew rate 5 A/μs
Transient response overshoot 200 mV
Transient response settling time 1 ms
SYSTEM
f
SW
Switching frequency 240 300 360 kHz
η
PK
Peak efficiency V
IN
= 12 V, 0 A ≤ I
OUT
≤ 10 A 90%
η Efficiency at full load V
IN
= 12 V, I
OUT
= 10 A 87%
T
OP
Operating temperature range 10.8 ≤ V
IN
≤ 13.2 V, 0 A ≤ I
OUT
≤ 10 A -40 25 85 °C
MECHANICAL
W Width 1.6
L Length 3.5 in
h Height 0.26
Copyright © 2007–2012, Texas Instruments Incorporated 21