Datasheet

ON OFF
UVLO
V V
R1
I
-
=
ExternalSYNC
(5V/div)
SW
(2V/div)
LDRV
(5V/div)
T-Time-1 ms/div
T-Time-1 ms/div
SW Master
(10V/div)
SW Slave
(10V/div)
SYNC
Out-of-Phase
fromMaster
TPS40195
SLUS720E FEBRUARY 2007REVISED JULY 2012
www.ti.com
The SYNC pin can also function as an output. To get this functionality, the RT pin must be connected to either
GND or to BP. When this is done the oscillator will run at either 250 kHz or 500 kHz. SYNC can then be
connected to other TPS40195 controllers (with their SYNC pins configured as an input) and the two or more
controllers will synchronize to the same switching frequency. The output waveform on SYNC will be
approximately a 50% duty cycle pulse train. The pull up is relatively weak, but the pull down is strong to insure
that a good clean signal is presented to any devices that are to be synchronized. A summary is shown in
Table 1.
Table 1. R
T
Connection and SYNC Pin Function
R
T
Connection SYNC Pin Function Switching Frequency
Resistor to GND Input See Equation 1
GND Output 250 kHz
BP Output 500 kHz
Using the TPS40195 with its RT pin connected to BP or to GND as a master clock source for another TPS40195
with a resistor connected from its RT pin to GND will result in the two controllers operating at the same frequency
but 180° out of phase.
Figure 18. TPS40195 Synchronized to External Figure 19. TPS40195 SYNC Pin Master/Slave
SYNC Pin Pulse (Negative Edge Triggered) Configuration. 180° Out-of-Phase Operation
Undervoltage Lockout (UVLO)
There are two separate UVLO circuits in the TPS40195. Both must be satisfied before the controller starts. One
circuit detects the BP voltage and the other circuit detects voltage on the UVLO pin. The voltage on the BP pin
(V
BP
) must be above 4.3 V in order for the device to start up.
The UVLO pin is generally used to provide a higher UVLO voltage than that which the BP UVLO circuit provides.
This level is programmed using a resistor divider from V
IN
to GND with the tap connected to the UVLO pin of the
TPS40195. Hysteresis is provided by a 5.2-μA current source that is turned on when the UVLO pin reaches the
1.26 V turn on threshold. The turn on level is determined by the divider ratio, and the hysteresis level is
determined by the divider equivalent impedance.
To determine the resistor values for the UVLO circuit, a turn on voltage and turn off voltage must be known.
Once these are known the resistors can be calculated in Equation 2 and Equation 3. The functional schematic is
shown in Figure 20.
(2)
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