Datasheet
www.ti.com
4.4.2 Power-Good (TP3, TP4, TP5)
4.4.3 Compensation and Initialization (TP6)
4.4.4 Switching Waveforms (TP7, TP8, TP9, TP10)
4.4.5 Loop Analysis (TP11, TP12, TP13, TP14)
4.4.6 Output Voltage and Monitoring (TP15, TP16)
4.4.7 Pre-Bias Input (TP17)
General Configuration and Description
The TPS40193EVM-001 has three test points to allow the user to evaluate the TPS40193 Power-Good
function. TP4 provides access to the Power-Good output of the TPS40193. It has a 100k Ω pull-up resistor
to the TPS40193 5V regulator, and can be used as a logic signal with no additional requirements. TP3
provides a connection for an external power-good source for 3.3V logic. TP3 is connected to the
power-good circuit through a 10k Ω pull-up resistor. TP5 provides a local ground access to connect a
remote disable circuit.
The TPS40193EVM-001 also provides a test point connection to the COMP pin of the TPS40193
controller. This test point can be used to monitor the COMP voltage during the controller Power On
Initialization that sets the controller short-circuit protection (SCP) threshold. The test point can also be
used to monitor the pulse-width modulator (PWM) comparator input voltage (COMP) during operation, or
used to measure the Power Stage Gain by following the Loop Analysis directions but moving Channel A
probe from TP12 to TP6.
The TPS40193EVM-001 has three test points and a local ground connection (TP7) to monitor the main
switching waveforms. Connect an oscilloscope probe to TP8 to monitor the high-side gate drive applied to
the gate of Q2. Connect an oscilloscope probe to TP9 to monitor the switch node voltage. The
gate-to-source voltage (V
GS
) of the high-side FET can be determined by a math function TP8—TP9 if both
channels use the same scale. Connect an oscilloscope probe to TP9 to monitor the low-side gate drive
applied to the gate of Q3. Because the source of Q3 is connected directly to ground, no math function is
required to determine the gate-to-source voltage of the low-side FET.
The TPS40193EVM-001 contains a 49.9 Ω series resistor (R14) in the feedback loop to allow for matched
impedance signal injection into the feedback for loop response analysis. An isolation transformer should
be used to apply a small (30mV or less) signal across R14 through TP12 and TP13. By monitoring the ac
injection level at TP13 and the returned ac level at TP14, the power-supply loop response can be
determined. Moving Channel A from TP12 to TP6 (COMP) the control-to-output response of the power
stage (also referred to as the power stage transfer function) can be directly measured. See Section 3.9xx
for a detailed procedure to perform loop response measurements.
There are two test points on the TPS40193EVM-001 for measuring the voltage generated by the module.
These test points allow the user to measure the actual module output voltage without losses from output
cables and connector losses. All output voltage measurements should be made between TP15 and TP16.
To use TP1 and TP2, connect a voltmeter positive terminal to TP15 and negative terminal to TP16. For
output ripple measurements, TP15 and TP16 allow a user to limit the ground loop area by using the tip
and barrel measurement technique shown in Figure 3xx. (All output ripple measurements should be made
using this method of measurement.)
The TPS40193EVM-001 contains a pre-bias injection circuit with 100 Ω resistor and series diode to allow
testing and evaluation of the TPS40193 pre-bias support compatibility. Apply a voltage less than the target
output voltage to TP17. Monitoring the output voltage during start-up demonstrates the ability of the
TPS40193 to power up without drawing current from a pre-biased output. D2 prevents the output voltage
from back-driving the pre-bias source.
SLUU274 – May 2007 Using the TPS40193EVM-001 7
Submit Documentation Feedback