Datasheet

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3.3.1 Input Voltage Monitoring (TP1 and TP2)
3.3.2 Disable (TP3 and TP4)
3.3.3 Compensation and Initialization (TP6)
3.3.4 Switching Waveforms (TP7, TP8, TP9, and TP10)
Schematic
Test Point Label Use Section
TP6 COMP Monitor COMP voltage and monitor power stage frequency response 3.3.3 and 3.3.5
TP7 GND Ground for SW, LDRV, and HDRV measurements 3.3.4
TP8 HDRV Monitor high-side gate drive (Q2) 3.3.4
TP9 SW Monitor switch-node waveforms 3.3.4
TP10 LDRV Monitor low-side gate drive (Q3) 3.3.4
TP11 GND Ground for loop-monitoring probe 3.3.5
TP12 CH1 Loop injection point and injection monitoring point 3.3.5
TP13 CH2 Loop injection point and output response monitoring point 3.3.5
TP14 GND Ground for loop-monitoring probe 3.3.5
TP15 Vout+ Monitor output voltage from the module 3.3.6
TP16 Vout– Monitor output voltage from the module 3.3.6
TP17 Power Good Power-good output voltage 3.3.7
TP18 Ext Source External source for power-good circuit 3.3.7
TP19 GND Ground for external source for power good 3.3.7
TP20 Prebias Injection point to test prebias load compliance 3.3.8
TPS40192EVM-001 provides two test points for measuring the voltage applied to the module. This allows
the user to measure the actual module voltage without losses from input cables and connector losses. All
input voltage measurements should be made between TP1 and TP2. To use TP1 and TP2, connect a
voltmeter positive terminal to TP1 and the negative terminal to TP2.
TPS40192EVM-001 defaults to the Enabled state. Short TP4 to TP3 to disable the TPS40192 controller.
TP4 also can be used as a Disable input driven by a 5-V logic input from an external circuit. The Enable
test point uses two 5.1-k Ω pulldown resistors in series so that TPS40192 turns on if the Enable test point
is left floating.
TPS40192EVM-001 provides a test-point connection to the COMP pin of the TPS40192 controller. This
test point can be used to monitor the COMP voltage during the controller's power-on initialization that sets
the controller's short-circuit protection (SCP) threshold. The test point also can be used to monitor the
PWM comparator input voltage (COMP) during operation or to measure the power-stage gain by following
the loop-analysis procedure in section 4.5 .
TPS40192EVM-001 provides three test points and a local ground connection (TP7) for the monitoring of
the main switching waveforms. Connect an oscilloscope probe to TP8 to monitor the high-side gate drive
applied to the gate of Q2. Connect an oscilloscope probe to TP9 to monitor the switch-node voltage. The
gate-to-source voltage (VGS) of the high-side FET can be determined by a math function TP8–TP9 if both
channels use the same scale. Connect an oscilloscope probe to TP9 to monitor the low-side gate drive
applied to the gate of Q3. Because the source of Q3 is connected directly to ground, no math function is
required to determine the gate-to-source voltage of the low-side FET.
Using the TPS40192EVM-001, A 12-V Input, 1.8-V Output, 10-A Synchronous Buck Converter6 SLVU194 – January 2007
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