Datasheet

I
G
+ f
SW
ǒ
Q
G (high)
) Q
G (low)
Ǔ
V
ENABLE
(5 V/ div)
V
COMP
(500 mV/ div)
V
OUT
(500 mV/ div)
T − Time − 2 ms / div
V
ENABLE
(10 V/ div)
V
LDRV
(10 V/ div)
V
OUT
(500 mV/ div)
V
SW
(10 V/ div)
T − Time − 20 µs / div
TPS40190
SLUS658C –JULY 2005–REVISED JULY 2012 www.ti.com
Typical waveforms for startup and shutdown using the ENABLE pin are shown in Figure 5 and Figure 6.
Figure 5. Startup Using ENABLE Pin Figure 6. Shutdown Using ENABLE Pin
5-V Regulator
The TPS40190 has an on board 5-V regulator that allows the part to operate from a single voltage feed. No
separate 5-V feed to the part is required. This regulator needs to have 4.7-μF of capacitance on the BP5 pin for
stability. A ceramic capacitor is suggested for this purpose.
This regulator can also be used to supply power to nearby circuitry, eliminating the need for a separate LDO in
some cases. If this pin is used for external loads, keep in mind that this is the power supply for the internals of
the TPS40190. While efforts have been made to reduce sensitivity, any noise induced on this line has an
adverse effect on the overall performance of the internal circuitry and shows up as increased pulse jitter, or
skewed reference voltage. This regulator is turned off when the ENABLE pin is pulled low.
The amount of power available from this pin varies with the size of the power MOSFETs that the drivers must
operate. Larger MOSFETs require more gate drive current and reduces the amount of power available on this pin
for other tasks.
The total amount of current required by the gate drive and the external circuitry should not exceed 40 mA. The
current required to drive the FET gates can be found from Equation 3.
Where
• I
G
is the required gate drive current
• f
SW
is the switching frequency (300 kHz)
• Q
G(high)
is the gate charge requirement for the high-side FET at 5 V V
GS
• Q
G(low)
is the gate charge requirement for the low-side FET at 5 V V
GS
(3)
Startup Sequence and Timing
The TPS40190 startup sequence is as follows. After input power is applied, the 5-V onboard regulator comes up.
Once this regulator comes up, the TPS40190 goes through a period where it samples the impedance at the
COMP pin and decides the short circuit protection threshold voltage. This is accomplished by placing 400 mV on
the COMP pin for approximately 2 ms. During this time, the current is measured and compared against internal
thresholds to select the short circuit protection threshold. After this, the COMP pin is brought low for 4 ms. This
ensures that the feedback loop is preconditioned at startup and no sudden output rise occurs at the output of the
converter when the converter is allowed to start switching. After these initial 6 milliseconds, the internal soft-start
circuitry is engaged and the converter is allowed to start. See Figure 7.
10 Copyright © 2005–2012, Texas Instruments Incorporated