Datasheet

TPS40170
SLUS970A MARCH 2011REVISED NOVEMBER 2013
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Bypass and Filtering
In an integrated circuit, supply bypassing is important for jitter-free operation. To decrease noise in the converter,
ceramic bypass capacitors must be placed as close to the package as possible.
1. VIN to GND: use 0.1 µF ceramic capacitor.
2. BP to GND: use 1 µF to 10 µF ceramic capacitor. It should be 10 times higher than bootstrap capacitance
3. VDD to GND: use 0.1 μF to 1 µF ceramic capacitor
Design Hints
Bootstrap Resistor
A small resistor in series with the bootstrap capacitor reduces the turn-on speed of the high-side MOSFET,
thereby reducing the rising edge ringing of the SW node and reduces short through induced by dv/dt. A bootstrap
resistor value that is too large delays the turn-on time of the high-side switch and may trigger an apparent SCP
fault. See DESIGN EXAMPLE.
SW Node Snubber Capacitor
Observable voltage ringing at the SW node is caused by fast switching edges and parasitic inductance and
capacitance. If the ringing results in excessive voltage on the SW node, or erratic operation of the converter, an
R-C snubber may be used to dampen the ringing and ensure proper operation over the full load range. See
design example.
Input Resistor
The TPS40170 has a wide input voltage range which allows for the device input to share power source with
power stage input. Power stage switching noise may pollute the device power source if the layout is not
adequate in minimizing noise. It may trigger short-circuit fault. If so, adding a small resistor between the device
input and power stage input is recommended. This resistor composites an R-C filter with the device input
capacitor and filter out the switching noise from power stage. See design example.
LDRV Gate Capacitor
Power device selection is important for proper switching operation. If the low-side MOSFET has low gate
capacitance Cgs (if Cgs<Cgd), there is a risk of short-through induced by high dv/dt at switching node (See
reference[1]) during high-side turned-on. If this happens, add a small capacitance between LDRV and GND. See
design example.
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