Datasheet

( )
( ) ( )
( )
(
)
( ) ( ) ( )
( )
(
)
+ ´ +
=
´ - ´ -
DS2 LOAD
OUT min OUT min
SW max
DS1 DS2
ON min IN max OUT min
V I R R
f
t V I R R
( )
æ ö
= - W
ç ÷
ç ÷
è ø
4
RT
SW
10
R 2 k
f
UDG-09200
V
COMP
V
IN
RAMP
Minimum OFF Time
V
CLK
PWM
t – Time
TPS40170
www.ti.com
SLUS970A MARCH 2011REVISED NOVEMBER 2013
Figure 18. Feed-Forward Oscillator Timing Diagram
Calculating the Timing Resistance (R
RT
)
where
f
SW
is the switching frequency in kHz
R
RT
is the resistor connected from RT pin to GND in kΩ (4)
NOTE
The switching frequency can be adjusted between 100 kHz and 600 kHz. The maximum
switching frequency before skipping pulses is determined by the input voltage, output
voltage, FET resistances, DCR of the inductor, and the minimum on time of the
TPS40170. Use Equation 5 to determine the maximum switching frequency. For further
details, please see application note SLYT293.
where
f
SW(max)
is the maximum switching frequency
V
OUT(min)
is the minimum output voltage
V
IN(max)
is the maximum input voltage
I
OUT(min)
is the minimum output current
R
DS1
is the high-side FET resistance
R
DS2
is the low-side FET resistance
and R
LOAD
is the inductor series resistance (5)
Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links :TPS40170