Datasheet

19
1
9
VIN
ENABLE
Always Active
I
SD
= 1 mA
V
DIS
TPS40170
+
+
AGND
DISABLE
UDG-09147
TPS40170
SLUS970A –MARCH 2011–REVISED NOVEMBER 2013 www.ti.com
APPLICATION INFORMATION
FUNCTIONAL DESCRIPTION
The TPS40170 is a synchronous PWM buck controller that accepts a wide range of input voltage from 4.5 V to
60 V and features voltage-mode control with input-voltage, feed-forward compensation. The switching frequency
is programmable from 100 kHz to 600 kHz.
The TPS40170 has a complete set of system protections such as programmable UVLO, programmable
overcurrent protection (OCP), selectable short-circuit protection (SCP) and thermal shutdown. The ENABLE pin
allows for system shutdown in a low-current (1-µA typical) mode. The controller supports pre-biased outputs,
provides an open-drain PGOOD signal, and has closed loop programmable soft-start, output voltage tracking and
adaptive dead time control.
The TPS40170 provides accurate output voltage regulation via 1% specified accuracy.
Additionally, the controller implements a novel scheme of bidirectional synchronization with one controller acting
as the master other downstream controllers acting as slaves, synchronized to the master in-phase or 180° out-of-
phase. Slave controllers can be synchronized to an external clock within ±30% of the internal switching
frequency.
LDO Linear Regulators and Enable
The TPS40170 has two internal low-drop-out (LDO) linear regulators. One has a nominal output voltage of V
VBP
and is present at the VBP pin. This is the voltage that is mainly used for the gate-driver output. The other linear
regulator has an output voltage of V
VDD
and is present at the VDD pin. This voltage can be used in external low-
current logic circuitry. The maximum allowable current drawn from the VDD pin must not exceed 5 mA.
The TPS40170 has a dedicated device enable pin (ENABLE). This simplifies user level interface design because
no multiplexed functions exist. If the ENABLE pin of the TPS40170 is higher than V
EN
, then the LDO regulators
are enabled. To ensure that the LDO regulators are disabled, the ENABLE pin must be pulled below V
DIS
. By
pulling the ENABLE pin below V
DIS
, the device is completely disabled and the current consumption is very low
(nominally, 1 µA). Both LDO regulators are actively discharged when the ENABLE pin is pulled below V
DIS
. A
functionally equivalent circuit to the enable circuitry on the TPS40170 is shown in Figure 16.
Figure 16. TPS40170 ENABLE Functional Block
The ENABLE pin must not be allowed to float. If the ENABLE function is not needed for the design, then it is
suggested that the ENABLE pin be pulled up to VIN by a high value resistor ensuring that the current into the
ENABLE pin does not exceed 10 µA. If it is not possible to meet this clamp current requirement, then it is
suggested that a resistor divider from VIN to GND be used to connect to ENABLE pin. The resistor divider should
be such that the ENABLE pin should be higher than V
EN
and lower than 8 V.
12 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links :TPS40170