Datasheet
R + 1.33
ǒ
39.2 10
3
f
*1.041
SW
* 7
Ǔ
+ 52.2 kW
TPS40140
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SLUS660H –SEPTEMBER 2005–REVISED JUNE 2013
6.3.3 Step 3: Peripheral Component Design
6.3.3.1 Master Module
6.3.3.1.1 RT (pin 5)
It is connected to GND with a resistor that sets the switching frequency.
(62)
Here, f
sw
represents the phase switching frequency. In the design, a 47-kΩ resistor is selected. The actual
switching frequency is 650 kHz.
6.3.3.1.2 COMP1 and COMP2 (pin 35 and pin 10)
COMP1 is connected to the compensator network.
COMP2 is directly tied to COMP1.
6.3.3.1.3 TRK1 and TRK2 (pin 33 and pin 12)
A soft start capacitor is connected between TRK1 and GND. TRK2 is directly tied to BP5 to set this
channel as a salve.
6.3.3.1.4 ILIM1 and ILIM2 (pin 34 and pin 11)
ILIM1 is connected to the resistor network that has the same design as the dual output example. The peak
current in Equation 43 and Equation 44 is the peak current of each phase.
ILIM2 is grounded.
6.3.3.1.5 FB1 and FB2 (pin 36 and pin 9)
FB1 is tied to the feedback network. FB2 is connected to GND.
6.3.3.1.6 PHSEL (pin 4)
For this four phase configuration, the PHSEL pin is tied to GND with a 39-kΩ resistor.
6.3.3.1.7 PGOOD1 and PGOOD2 (pin 30 and pin 15)
Both of PGOOD1 and PGOOD2 are tied to BP5 with a 10-kΩ resistor.
6.3.3.1.8 CLKIO (pin 28)
CLKIO is connected to the same pin in the salve module.
6.3.3.2 Slave Module:
6.3.3.2.1 RT (pin 5)
It is connected to BP5. The slave module receives the clock from the master module.
6.3.3.2.2 COMP1 and COMP2 (pin 35 and pin 10)
Both of COMP1 and COMP2 are directly tied together to COMP1 or COMP2 in the master module.
6.3.3.2.3 TRK1 and TRK2 (pin 33 and pin 12)
Both TRK1 and TRK2 are directly tied to BP5.
6.3.3.2.4 ILIM1 and ILIM2 ( pin 34 and pin 11)
Both ILIM1 and ILIM2 are grounded.
Copyright © 2005–2013, Texas Instruments Incorporated DESIGN EXAMPLES 55
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