Datasheet

( )
( )
1.041
3
RT SW
R 1.33 39.2 10 f 7 71.5 k
-
= ´ ´ ´ - = W
IN(nom) PH
2
OUT
PH PH PH
2
PH PH sw OUT
2 3 2 3
PH PH
PH PH
PH PH
ΔI (N ,D) =
V × (1- D)
k(N , D) k(N , D) + 1 N
[(D - )×( - D)] + ( ) × [ ] ×
N N 12 × D L × f × I
k(N , D) k(N , D) + 1
[(k(N , D) +1) × (D - ) + k(N , D) × ( - D) ]
N N
TPS40140
www.ti.com SLUS660H –SEPTEMBER 2005–REVISED JUNE 2013
Another important consideration for the input capacitor is the RMS ripple current rating. Due to the
interleaving of multi-phase, the input RMS current is reduced. The input ripple current RMS value over
load current is calculated in Equation 59.
(59)
where
• k(N
PH
, D) = floor (N
PH
× D),in this example, k(N
PH
, D) =0
• Floor(x) is the function to return the greatest integer less than or equal to x
• N
PH
is the number of active phases, in this example, N
PH
=2
In this design, the maximum input ripple RMS current is calculated to be 7.2 A with the minimum input
voltage. It is about 34% reduction compared with a 32-A single-phase converter design. Each selected
ceramic capacitor has a RMS current rating of 4.3 A and, therefore, sufficient to reach this requirement.
6.2.3 Step 3: Peripheral Component Design
6.2.3.1 Switching Frequency Setting (RT pin 5)
(60)
where
• f
sw
represents the phase switching frequency
In the design, a 64.9-kΩ resistor is selected. The actual switching frequency is 490 kHz.
6.2.3.2 COMP1 and COMP2 (pin 35 and pin 10)
COMP1 is connected to the compensator network. The selection of compensation components is similar
to the dual output design example.
COMP2 is directly tied to COMP1.
6.2.3.3 TRK1 and TRK2 (pin 33 and pin 12)
A soft start capacitor is connected between TRK1 and GND. TRK2 is directly tied to BP5 to set this
channel as a slave
6.2.3.4 ILIM1 and ILIM2 (pin 34 and pin 11)
ILIM1 is connected to the resistor network that has the same design as the dual output example. The peak
current in Equation 43 and Equation 44 is the peak current of each phase.
ILIM2 is connected to GND.
6.2.3.5 FB1 and FB2 (pin 36 and pin 9)
FB1 is tied to the feedback network. FB2 is connected to GND.
6.2.3.6 PHSEL (pin 4)
For this two phase configuration, the PHSEL pin is directly tied to GND.
Copyright © 2005–2013, Texas Instruments Incorporated DESIGN EXAMPLES 51
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